Ring rolling mill and ring rolling method
    1.
    发明授权
    Ring rolling mill and ring rolling method 有权
    环轧机和环轧法

    公开(公告)号:US08689597B2

    公开(公告)日:2014-04-08

    申请号:US13727990

    申请日:2012-12-27

    CPC classification number: B21B17/02 B21B5/00 B21H1/06

    Abstract: This ring rolling mill includes a main roll and a mandrel that are brought close to or separated from each other, and roll a peripheral portion of a ring-shaped body in a radial direction of the ring-shaped body while the ring-shaped body is rotated along its peripheral direction in a state where the peripheral portion of the ring-shaped body is pinched in the radial direction between an outer peripheral surface of the main roll, and an outer peripheral surface of the mandrel. This ring rolling mill further includes a mechanism which inclines and supports the mandrel with respect to the rotation axis of the main roll such that the gap between the outer peripheral surface of the mandrel and the outer peripheral surface of the main roll differs on one side and on the other side as seen in a direction along the rotation axis of the main roll.

    Abstract translation: 该环轧机包括彼此接近或分离的主辊和心轴,并且环形体是环状体在径向方向上滚动环形体的周边部分 环状体的周缘部在主辊的外周面与心轴的外周面之间沿径向夹持的状态沿其圆周方向旋转。 该环轧机还包括相对于主辊的旋转轴线倾斜并支撑心轴的机构,使得心轴的外周面与主辊的外周面之间的间隙在一侧不同, 在沿着主辊的旋转轴线的方向观察的另一侧。

    Ring rolling mill and ring rolling method
    2.
    发明授权
    Ring rolling mill and ring rolling method 有权
    环轧机和环轧法

    公开(公告)号:US08365564B2

    公开(公告)日:2013-02-05

    申请号:US12294533

    申请日:2007-03-28

    CPC classification number: B21B17/02 B21B5/00 B21H1/06

    Abstract: This ring rolling mill includes a main roll and a mandrel provided so as to be capable of being brought close to or separated from each other, and rolling a peripheral portion of a ring-shaped body in a radial direction of the ring-shaped body while the ring-shaped body is rotated along its peripheral direction in a state where the peripheral portion of the ring-shaped body is pinched in the radial direction between an outer peripheral surface of the main roll which is rotationally driven, and an outer peripheral surface of the mandrel which is rotatable. This ring rolling mill further includes a mandrel inclining/supporting mechanism which inclines and supports the mandrel with respect to the axis of rotation of the main roll such that the gap between the outer peripheral surface of the mandrel and the outer peripheral surface of the main roll differs on one side and on the other side as seen in a direction along the axis of rotation of the main roll.

    Abstract translation: 该环轧机包括主辊和心轴,其设置成能够彼此靠近或分离,并且在环形体的径向方向上滚动环形体的周边部分,同时 在环状体的周缘部沿径向被夹持在主旋转驱动的主辊的外周面与外周面之间的状态下,环状体沿其圆周方向旋转, 可旋转的心轴。 该环轧机还包括:心轴倾​​斜/支撑机构,其相对于主辊的旋转轴线倾斜并支撑心轴,使得心轴的外周面与主辊的外周面之间的间隙 在沿着主辊的旋转轴线的方向观察时,在一侧和另一侧是不同的。

    Field effect transistor and method for manufacturing the same
    3.
    发明授权
    Field effect transistor and method for manufacturing the same 有权
    场效应晶体管及其制造方法

    公开(公告)号:US08288804B2

    公开(公告)日:2012-10-16

    申请号:US12991958

    申请日:2009-05-22

    CPC classification number: H01L51/0545 B82Y10/00 H01L51/0048

    Abstract: Provided is a carbon nanotube field effect transistor manufacturing method wherein carbon nanotube field effect transistors having excellent stable electric conduction property are manufactured with excellent reproducibility. After arranging carbon nanotubes to be a channel on a substrate, the carbon nanotubes are covered with an insulating protection film. Then, a source electrode and a drain electrode are formed on the insulating protection film. At this time, a contact hole is formed on the protection film, and the carbon nanotubes are connected with the source electrode and the drain electrode. Then, a wiring protection film, a conductive film and a plasma CVD film are sequentially formed on the insulating protection film, the source electrode and the drain electrode. In the field effect transistor thus manufactured, since the carbon nanotubes to be the channel are not contaminated and not damaged, excellent stable electric conductive property is exhibited.

    Abstract translation: 提供一种碳纳米管场效应晶体管的制造方法,其制造具有优异的稳定导电性的碳纳米管场效应晶体管,具有优异的再现性。 在将碳纳米管设置在基板上的通道之后,碳纳米管被绝缘保护膜覆盖。 然后,在绝缘保护膜上形成源电极和漏电极。 此时,在保护膜上形成接触孔,碳纳米管与源电极和漏极连接。 然后,在绝缘保护膜,源电极和漏电极上依次形成布线保护膜,导电膜和等离子体CVD膜。 在这样制造的场效应晶体管中,由于作为沟道的碳纳米管不被污染而不被损坏,所以表现出优异的稳定的导电性。

    RING ROLLING MILL AND RING ROLLING METHOD
    4.
    发明申请
    RING ROLLING MILL AND RING ROLLING METHOD 有权
    环形轧机和环轧方法

    公开(公告)号:US20100236311A1

    公开(公告)日:2010-09-23

    申请号:US12294533

    申请日:2007-03-28

    CPC classification number: B21B17/02 B21B5/00 B21H1/06

    Abstract: This ring rolling mill includes a main roll and a mandrel provided so as to be capable of being brought close to or separated from each other, and rolling a peripheral portion of a ring-shaped body in a radial direction of the ring-shaped body while the ring-shaped body is rotated along its peripheral direction in a state where the peripheral portion of the ring-shaped body is pinched in the radial direction between an outer peripheral surface of the main roll which is rotationally driven, and an outer peripheral surface of the mandrel which is rotatable. This ring rolling mill further includes a mandrel inclining/supporting mechanism which inclines and supports the mandrel with respect to the axis of rotation of the main roll such that the gap between the outer peripheral surface of the mandrel and the outer peripheral surface of the main roll differs on one side and on the other side as seen in a direction along the axis of rotation of the main roll.

    Abstract translation: 该环轧机包括主辊和心轴,其设置成能够彼此靠近或分离,并且在环形体的径向方向上滚动环形体的周边部分,同时 在环状体的周缘部沿径向被夹持在主旋转驱动的主辊的外周面与外周面之间的状态下,环状体沿其圆周方向旋转, 可旋转的心轴。 该环轧机还包括:心轴倾​​斜/支撑机构,其相对于主辊的旋转轴线倾斜并支撑心轴,使得心轴的外周表面与主辊的外周表面之间的间隙 在沿着主辊的旋转轴线的方向观察时,在一侧和另一侧是不同的。

    Frame producing method and frame
    5.
    发明申请
    Frame producing method and frame 有权
    框架制作方法和框架

    公开(公告)号:US20050223556A1

    公开(公告)日:2005-10-13

    申请号:US10520968

    申请日:2003-07-10

    Abstract: In this manufacturing method for a frame body, after ring rolling a metal material to form a ring-shaped member, a rectangular member is formed by pressing and deforming this ring-shaped member in the radial direction. At this time, an angle of corner portions that impart the rectangular shape to the rectangular member is formed smaller than an angle of the frame body that is to be obtained by die forging the rectangular member. According to the frame body obtained by this manufacturing method for a frame body, it is possible to increase the mechanical strength, and in particular, the creep strength. Furthermore, when forming the frame body, the occurrence of defects during manufacture may be restrained, it becomes possible to realize a reduction of the amount of waste metal material and the manufacturing time, and thereby this frame body may be formed inexpensively.

    Abstract translation: 在该框体的制造方法中,在环状轧制金属材料以形成环状构件之后,通过使该环形构件在径向上进行压制和变形来形成矩形构件。 此时,形成矩形构件的矩形形状的角部的角度小于通过锻造矩形构件而获得的框体的角度。 根据通过该框体的制造方法获得的框体,可以增加机械强度,特别是增加蠕变强度。 此外,当形成框体时,可以抑制制造时的缺陷的发生,可以实现废金属材料的量的减少和制造时间,从而可以廉价地形成框架体。

    Method of detecting defects in a wiring process
    6.
    发明授权
    Method of detecting defects in a wiring process 有权
    检测布线过程中的缺陷的方法

    公开(公告)号:US06204075B1

    公开(公告)日:2001-03-20

    申请号:US09310136

    申请日:1999-05-12

    Inventor: Hiroaki Kikuchi

    CPC classification number: H01L22/34 H01L23/528 H01L2924/0002 H01L2924/00

    Abstract: A circuit, a semiconductor wafer including the circuit and a method for detecting defects of wiring used for detecting a malfunction in a wiring fabrication process during semiconductor device manufacturing. The circuit comprises an insulating film formed on a semiconductor substrate, a first wiring which is formed on the insulating film formed on the semiconductor substrate and is in an electrically floating condition, and a second wiring which is formed on the insulating film formed on the semiconductor substrate and is disposed adjacent to the first wiring and is in an electrically floating condition, wherein the capacitance between the second wiring and the semiconductor substrate is larger than the capacitance between the first wiring and the semiconductor substrate. Portions of the first and second wiring are scanned by an electron beam on the surfaces thereof, and secondary electrons emitted from the first wiring and second wiring are detected.

    Abstract translation: 电路,包括电路的半导体晶片和用于检测在半导体器件制造期间用于检测布线制造工艺中的故障的布线的缺陷的方法。 该电路包括形成在半导体衬底上的绝缘膜,形成在形成于半导体衬底上并处于电浮置状态的绝缘膜上的第一布线,以及形成在半导体上形成的绝缘膜上的第二布线 衬底并且被布置为与第一布线相邻并且处于电浮置状态,其中第二布线和半导体衬底之间的电容大于第一布线和半导体衬底之间的电容。 通过电子束在其表面上扫描第一和第二布线的部分,并且检测从第一布线和第二布线发射的二次电子。

    Method of producing bonded substrate with silicon-on-insulator structure
    7.
    发明授权
    Method of producing bonded substrate with silicon-on-insulator structure 失效
    用绝缘体上硅结构生产键合衬底的方法

    公开(公告)号:US5985681A

    公开(公告)日:1999-11-16

    申请号:US937009

    申请日:1997-09-24

    CPC classification number: H01L21/76251 Y10S438/977

    Abstract: Two wafers of single-crystal silicon are used to produce a bonded substrate having a silicon-on-insulator (SOI) structure. In a principal surface of a first wafer, a number of first insulator film patterns of equal thickness art formed for isolation of semiconductor devices to be fabricated on the bonded substrate. Simultaneously, at least to second insulator film patterns having the same thickniess as the first insulator film patterns are formed in the same surface of the first wafer for optical measurement of the thickness of an active layer of in the bonded substrate. Then the first wafer is bonded to a second wafer to obtain a bonded substrate in which the insulator film patterns are buried adjacent to the interface between the two silicon wafers. To form an active layer having a desired thickness above the buried insulator film patterns, the thickness of the first wafer is reduced by mechanical grinding and chemical-mechanical polishing. The polishing operation is intermitted at suitable time intervals, and the thickness of the active layer is measured by an optical method in the area of each of the second insulator film patterns while the polishing operation is intermitted.

    Abstract translation: 使用两片单晶硅晶片来制造具有绝缘体上硅(SOI)结构的键合衬底。 在第一晶片的主表面中,形成了用于隔离待制造在键合衬底上的半导体器件的多个等厚度的第一绝缘膜图案。 同时,至少在与第一绝缘膜图形相同厚度的第二绝缘膜图案形成在第一晶片的相同表面上,用于光学测量键合衬底中的有源层的厚度。 然后将第一晶片接合到第二晶片,以获得其中绝缘膜图案被掩埋在两个硅晶片之间的界面附近的键合衬底。 为了在掩埋绝缘膜图案上方形成具有所需厚度的有源层,通过机械研磨和化学机械抛光来减少第一晶片的厚度。 以合适的时间间隔进行抛光操作,并且通过光学方法在每个第二绝缘膜图案的区域中测量有源层的厚度,同时中间抛光操作。

    Semiconductor substrate with SOI structure
    8.
    发明授权
    Semiconductor substrate with SOI structure 失效
    具有SOI结构的半导体衬底

    公开(公告)号:US5844294A

    公开(公告)日:1998-12-01

    申请号:US774424

    申请日:1996-12-30

    CPC classification number: H01L21/76264 H01L21/76275 H01L21/76286

    Abstract: A semiconductor substrate which is optimum for a substrate for integrating a vertical power element and a control circuit element monolithically. A cavity 3 is formed between a dielectric layer 2 and a single crystal silicon substrate 4 in a control circuit element forming region 8, and junction planes 1a and 4a of single crystal silicon substrates 1 and 4 are joined together. Since bonding of regions where a vertical power element is formed is made with flat single crystal silicon planes, no void (non-bonded portion) is generated on the junction plane of the region where the vertical power element is formed. As a result, it is possible to realize a semiconductor device provided with perfect junction having electrical conductivity in a direction perpendicular to the junction interface.

    Abstract translation: 一种半导体衬底,其对于用于将垂直功率元件和控制电路元件整体地集成的衬底是最佳的。 在控制电路元件形成区域8中的介电层2和单晶硅基板4之间形成有空穴3,单晶硅基板1和4的接合面1a和4a接合在一起。 由于形成垂直功率元件的区域的结合由平坦的单晶硅平面制成,所以在形成垂直功率元件的区域的结面上不产生空隙(非接合部分)。 结果,可以实现在垂直于接合界面的方向上具有导电性的完美结的半导体器件。

    Soi Substrate
    9.
    发明授权
    Soi Substrate 失效
    Soi底物

    公开(公告)号:US5753353A

    公开(公告)日:1998-05-19

    申请号:US554720

    申请日:1995-11-07

    Inventor: Hiroaki Kikuchi

    Abstract: An SOI substrate comprises a silicon supporting substrate, an insulating film formed on the top of the silicon supporting substrate and a silicon active layer formed on the insulating film. The silicon supporting substrate is doped with an impurity at a concentration not less than 1.times.10.sup.17 atoms/cm.sup.3, provided that the impurity is kept in the solid solution state at a solidifying point of silicon. The impurity may comprise boron, phosphorus and arsenic.

    Abstract translation: SOI衬底包括硅支撑衬底,形成在硅支撑衬底的顶部上的绝缘膜和形成在绝缘膜上的硅有源层。 如果杂质在硅的固化点处保持在固溶状态,则硅支撑衬底掺杂浓度不小于1×10 17原子/ cm 3的杂质。 杂质可能含有硼,磷和砷。

    Laminated substrate for semiconductor device and manufacturing method
thereof
    10.
    发明授权
    Laminated substrate for semiconductor device and manufacturing method thereof 失效
    半导体装置用层叠基板及其制造方法

    公开(公告)号:US5374582A

    公开(公告)日:1994-12-20

    申请号:US233940

    申请日:1994-04-28

    CPC classification number: H01L21/76251 H01L21/187 H01L21/761 Y10S148/012

    Abstract: A method for fabricating a laminated substrate for a semiconductor device having a high voltage power device and a low voltage element formed in a region isolated from the power device with a P-N junction. The region for the low voltage element is formed on a buried layer of P type formed in the region of N type in which the power device is formed and surrounded by a isolating region of P type reaching the buried layer from the surface of the laminated substrate.

    Abstract translation: 一种用于制造半导体器件的层压衬底的方法,所述半导体器件具有形成在与具有P-N结的功率器件隔离的区域中的高电压功率器件和低电压元件。 低电压元件的区域形成在形成有功率器件的N型区域中形成的P型掩埋层,并且由层叠衬底的表面到达掩埋层的P型隔离区包围 。

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