Abstract:
This ring rolling mill includes a main roll and a mandrel that are brought close to or separated from each other, and roll a peripheral portion of a ring-shaped body in a radial direction of the ring-shaped body while the ring-shaped body is rotated along its peripheral direction in a state where the peripheral portion of the ring-shaped body is pinched in the radial direction between an outer peripheral surface of the main roll, and an outer peripheral surface of the mandrel. This ring rolling mill further includes a mechanism which inclines and supports the mandrel with respect to the rotation axis of the main roll such that the gap between the outer peripheral surface of the mandrel and the outer peripheral surface of the main roll differs on one side and on the other side as seen in a direction along the rotation axis of the main roll.
Abstract:
This ring rolling mill includes a main roll and a mandrel provided so as to be capable of being brought close to or separated from each other, and rolling a peripheral portion of a ring-shaped body in a radial direction of the ring-shaped body while the ring-shaped body is rotated along its peripheral direction in a state where the peripheral portion of the ring-shaped body is pinched in the radial direction between an outer peripheral surface of the main roll which is rotationally driven, and an outer peripheral surface of the mandrel which is rotatable. This ring rolling mill further includes a mandrel inclining/supporting mechanism which inclines and supports the mandrel with respect to the axis of rotation of the main roll such that the gap between the outer peripheral surface of the mandrel and the outer peripheral surface of the main roll differs on one side and on the other side as seen in a direction along the axis of rotation of the main roll.
Abstract:
Provided is a carbon nanotube field effect transistor manufacturing method wherein carbon nanotube field effect transistors having excellent stable electric conduction property are manufactured with excellent reproducibility. After arranging carbon nanotubes to be a channel on a substrate, the carbon nanotubes are covered with an insulating protection film. Then, a source electrode and a drain electrode are formed on the insulating protection film. At this time, a contact hole is formed on the protection film, and the carbon nanotubes are connected with the source electrode and the drain electrode. Then, a wiring protection film, a conductive film and a plasma CVD film are sequentially formed on the insulating protection film, the source electrode and the drain electrode. In the field effect transistor thus manufactured, since the carbon nanotubes to be the channel are not contaminated and not damaged, excellent stable electric conductive property is exhibited.
Abstract:
This ring rolling mill includes a main roll and a mandrel provided so as to be capable of being brought close to or separated from each other, and rolling a peripheral portion of a ring-shaped body in a radial direction of the ring-shaped body while the ring-shaped body is rotated along its peripheral direction in a state where the peripheral portion of the ring-shaped body is pinched in the radial direction between an outer peripheral surface of the main roll which is rotationally driven, and an outer peripheral surface of the mandrel which is rotatable. This ring rolling mill further includes a mandrel inclining/supporting mechanism which inclines and supports the mandrel with respect to the axis of rotation of the main roll such that the gap between the outer peripheral surface of the mandrel and the outer peripheral surface of the main roll differs on one side and on the other side as seen in a direction along the axis of rotation of the main roll.
Abstract:
In this manufacturing method for a frame body, after ring rolling a metal material to form a ring-shaped member, a rectangular member is formed by pressing and deforming this ring-shaped member in the radial direction. At this time, an angle of corner portions that impart the rectangular shape to the rectangular member is formed smaller than an angle of the frame body that is to be obtained by die forging the rectangular member. According to the frame body obtained by this manufacturing method for a frame body, it is possible to increase the mechanical strength, and in particular, the creep strength. Furthermore, when forming the frame body, the occurrence of defects during manufacture may be restrained, it becomes possible to realize a reduction of the amount of waste metal material and the manufacturing time, and thereby this frame body may be formed inexpensively.
Abstract:
A circuit, a semiconductor wafer including the circuit and a method for detecting defects of wiring used for detecting a malfunction in a wiring fabrication process during semiconductor device manufacturing. The circuit comprises an insulating film formed on a semiconductor substrate, a first wiring which is formed on the insulating film formed on the semiconductor substrate and is in an electrically floating condition, and a second wiring which is formed on the insulating film formed on the semiconductor substrate and is disposed adjacent to the first wiring and is in an electrically floating condition, wherein the capacitance between the second wiring and the semiconductor substrate is larger than the capacitance between the first wiring and the semiconductor substrate. Portions of the first and second wiring are scanned by an electron beam on the surfaces thereof, and secondary electrons emitted from the first wiring and second wiring are detected.
Abstract:
Two wafers of single-crystal silicon are used to produce a bonded substrate having a silicon-on-insulator (SOI) structure. In a principal surface of a first wafer, a number of first insulator film patterns of equal thickness art formed for isolation of semiconductor devices to be fabricated on the bonded substrate. Simultaneously, at least to second insulator film patterns having the same thickniess as the first insulator film patterns are formed in the same surface of the first wafer for optical measurement of the thickness of an active layer of in the bonded substrate. Then the first wafer is bonded to a second wafer to obtain a bonded substrate in which the insulator film patterns are buried adjacent to the interface between the two silicon wafers. To form an active layer having a desired thickness above the buried insulator film patterns, the thickness of the first wafer is reduced by mechanical grinding and chemical-mechanical polishing. The polishing operation is intermitted at suitable time intervals, and the thickness of the active layer is measured by an optical method in the area of each of the second insulator film patterns while the polishing operation is intermitted.
Abstract:
A semiconductor substrate which is optimum for a substrate for integrating a vertical power element and a control circuit element monolithically. A cavity 3 is formed between a dielectric layer 2 and a single crystal silicon substrate 4 in a control circuit element forming region 8, and junction planes 1a and 4a of single crystal silicon substrates 1 and 4 are joined together. Since bonding of regions where a vertical power element is formed is made with flat single crystal silicon planes, no void (non-bonded portion) is generated on the junction plane of the region where the vertical power element is formed. As a result, it is possible to realize a semiconductor device provided with perfect junction having electrical conductivity in a direction perpendicular to the junction interface.
Abstract:
An SOI substrate comprises a silicon supporting substrate, an insulating film formed on the top of the silicon supporting substrate and a silicon active layer formed on the insulating film. The silicon supporting substrate is doped with an impurity at a concentration not less than 1.times.10.sup.17 atoms/cm.sup.3, provided that the impurity is kept in the solid solution state at a solidifying point of silicon. The impurity may comprise boron, phosphorus and arsenic.
Abstract translation:SOI衬底包括硅支撑衬底,形成在硅支撑衬底的顶部上的绝缘膜和形成在绝缘膜上的硅有源层。 如果杂质在硅的固化点处保持在固溶状态,则硅支撑衬底掺杂浓度不小于1×10 17原子/ cm 3的杂质。 杂质可能含有硼,磷和砷。
Abstract:
A method for fabricating a laminated substrate for a semiconductor device having a high voltage power device and a low voltage element formed in a region isolated from the power device with a P-N junction. The region for the low voltage element is formed on a buried layer of P type formed in the region of N type in which the power device is formed and surrounded by a isolating region of P type reaching the buried layer from the surface of the laminated substrate.