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    Apparatus for recording and reproducing a digital video signal
    1.
    发明授权
    Apparatus for recording and reproducing a digital video signal 失效
    用于记录和再现数字视频信号的装置

    公开(公告)号：US5585930A

    公开(公告)日：1996-12-17

    申请号：US240066

    申请日：1994-05-09

    申请人： Hirofumi Uchida ,  Tatsuro Juri ,  Masakazu Nishino

    发明人： Hirofumi Uchida ,  Tatsuro Juri ,  Masakazu Nishino

    IPC分类号： H04N5/92 ,  G11B20/12 ,  H04N9/804 ,  H04N9/808 ,  H04N9/80

    CPC分类号： H04N9/8047

    摘要： Data rates of a first video signal and a second video signal which are significantly different are converted to respective predetermined data rates, and both the video signals of one frame are divided into respective numbers of macro block. A ratio of the number of macro block of the first video signal to the number of macro block of the second signal is made to 1:n, where n is a natural number, and a ratio of the number of pixel in one macro block of a color difference signal of the first video signal to the number of pixel in one macro block of the color difference signal of the second video signal is made to 1:m, where m is a natural number. A ratio of the data rate of the color difference signal of the first video signal to the data rate of the color difference signal of the second video signal is made to 1:n.times.m and a ratio of a moving speed of a magnetic tape in the first video signal to a moving speed of the magnetic tape in the second video image is made to 1:n.

    摘要翻译： 将显着不同的第一视频信号和第二视频信号的数据速率转换为相应的预定数据速率，并且将一帧的视频信号划分为相应数量的宏块。 将第一视频信号的宏块的数量与第二信号的宏块的数量的比率设为1：n，其中n是自然数，并且一个宏块中的像素数的比率 将第一视频信号的色差信号与第二视频信号的色差信号的一个宏块中的像素数量设为1：m，其中m为自然数。 将第一视频信号的色差信号的数据速率与第二视频信号的色差信号的数据速率的比率设置为1：n×m，并且将第一视频信号中的磁带的移动速度的比率 将第二视频图像中的磁带的移动速度的视频信号设为1：n。

    Video signal digital magnetic recording reproducing apparatus, with variable length coding data compression
    3.
    发明授权
    Video signal digital magnetic recording reproducing apparatus, with variable length coding data compression 失效
    视频信号数字磁记录再现装置，具有可变长度编码数据压缩

    公开(公告)号：US5341250A

    公开(公告)日：1994-08-23

    申请号：US27281

    申请日：1993-03-05

    申请人： Hirofumi Uchida ,  Tatsuro Juri ,  Hideki Ohtaka

    发明人： Hirofumi Uchida ,  Tatsuro Juri ,  Hideki Ohtaka

    IPC分类号： G11B20/12 ,  H04N5/92 ,  H04N5/926 ,  G11B5/09 ,  H04N5/76

    CPC分类号： H04N5/9264 ,  H04N5/926

    摘要： In a video signal digital magnetic recording and/or reproducing apparatus, an input image data array is rearranged into a different data array appropriate for data compression and then subjected to a data compression by variable length coding. The resulting data are rearranged after the data compression and then recorded sequentially onto a video track of a magnetic tape in the same order as that in the frame. In a high-speed playback mode, only the lower frequency component data is decoded every sync block, so that the data reproduced from one video track adjoin each other in the playback picture on the screen.

    摘要翻译： 在视频信号数字磁记录和/或再现装置中，将输入图像数据阵列重新排列成适于数据压缩的不同数据阵列，然后通过可变长度编码进行数据压缩。 所得到的数据在数据压缩之后重新排列，然后以与帧中相同的顺序顺序地记录在磁带的视频轨道上。 在高速播放模式中，每个同步块仅对较低频率分量数据进行解码，使得从一个视频轨道再现的数据在屏幕上的回放图像中彼此相邻。

    Manufacturing process developing method for semiconductor device
    4.
    发明授权
    Manufacturing process developing method for semiconductor device 有权
    半导体器件制造工艺开发方法

    公开(公告)号：US07236840B2

    公开(公告)日：2007-06-26

    申请号：US10921150

    申请日：2004-08-19

    申请人： Hirofumi Uchida

    发明人： Hirofumi Uchida

    IPC分类号： G06F19/00

    CPC分类号： G05B19/41865 ,  Y02P90/20

    摘要： Before a process design stage of judging whether a process flow involves any problems, items and standards of a process PAC, which is a PAC of a process necessary for development of a manufacturing process, and of an element PAC, which is a PAC of an element technology used in the process are set, while linking the process PAC and the element PAC with each other.

    摘要翻译： 在判断过程流程是否涉及过程PAC的任何问题，项目和标准的过程设计阶段之前，其是作为开发制造过程所必需的过程的PAC和作为PAC的PAC的元素PAC 在过程中使用的元素技术被设置，同时将过程PAC和元素PAC彼此连接。

    Computer-readable recording medium storing data collection program and data collection apparatus
    5.
    发明申请
    Computer-readable recording medium storing data collection program and data collection apparatus 审中-公开
    存储数据采集程序和数据采集装置的计算机可读记录介质

    公开(公告)号：US20070106671A1

    公开(公告)日：2007-05-10

    申请号：US11376125

    申请日：2006-03-16

    申请人： Hirofumi Uchida ,  Masaharu Koyabu ,  Kazuo Kayamoto ,  Toshikazu Sugita ,  Kenichiro Miyamoto

    发明人： Hirofumi Uchida ,  Masaharu Koyabu ,  Kazuo Kayamoto ,  Toshikazu Sugita ,  Kenichiro Miyamoto

    IPC分类号： G06F17/30

    CPC分类号： G06F16/2471

    摘要： A computer-readable recording medium storing a data collection program for easily performing a process to collect data from a plurality of core systems at desired timing, and combine and analyze the data and data in a local database. An access request decomposer determines at least one remote database to be accessed, based on an access request accepted by an information management unit, and decomposes the access request into remote access requests each for accessing each of the remote databases. An access unit accesses the remote databases based on the remote access requests created by the access decomposer and extracts data from the remote databases. An aggregation unit aggregates the data extracted by the access unit, and then the aggregation result is displayed.

    摘要翻译： 一种存储数据采集程序的计算机可读记录介质，用于容易地执行在期望的定时从多个核心系统收集数据的过程，并且组合和分析本地数据库中的数据和数据。 访问请求分解器基于由信息管理单元接受的访问请求来确定要访问的至少一个远程数据库，并将访问请求分解为每个用于访问每个远程数据库的远程访问请求。 访问单元基于由访问分解器创建的远程访问请求访问远程数据库，并从远程数据库中提取数据。 聚合单元聚合由访问单元提取的数据，然后显示聚合结果。

    Data transfer method and device
    6.
    发明申请
    Data transfer method and device 审中-公开
    数据传输方式和设备

    公开(公告)号：US20060056439A1

    公开(公告)日：2006-03-16

    申请号：US10515389

    申请日：2003-05-12

    申请人： Toshiyuki Kohri ,  Hirofumi Uchida ,  Hideki Ohtaka ,  Hiroyuki Katanoshi ,  Ichirou Okamoto

    发明人： Toshiyuki Kohri ,  Hirofumi Uchida ,  Hideki Ohtaka ,  Hiroyuki Katanoshi ,  Ichirou Okamoto

    IPC分类号： H04J3/16

    CPC分类号： H04L12/6418 ,  H04L29/06027

    摘要： A method and apparatus enable high speed transfer of real-time AV data over a bus. When transmitting real-time data of a specific format using isochronous packets, data indicating the transfer rate is added to the isochronous packet. The playback speed can be changed and playback can be stopped while maintaining the transfer rate. High speed data transmission is thus possible.

    摘要翻译： 一种方法和装置能够通过总线实现实时AV数据的高速传输。 当使用同步分组发送特定格式的实时数据时，将表示传输速率的数据添加到同步分组。 播放速度可以改变，播放可以在保持传输速率的同时停止。 因此，高速数据传输是可能的。

    Method for fabricating a transfer model optical semiconductor apparatus
    7.
    发明授权
    Method for fabricating a transfer model optical semiconductor apparatus 失效
    用于制造转印模制的光学半导体装置的方法

    公开(公告)号：US5472646A

    公开(公告)日：1995-12-05

    申请号：US8138

    申请日：1993-01-25

    申请人： Hirofumi Uchida ,  Kazuya Fujita

    发明人： Hirofumi Uchida ,  Kazuya Fujita

    IPC分类号： H01L23/12 ,  B29C45/14 ,  H01L21/52 ,  H01L21/56 ,  H01L23/28 ,  B29C45/02

    CPC分类号： B29C45/14655 ,  H01L21/565 ,  H01L2924/0002

    摘要： A transfer molded semiconductor method arranges a semiconductor chip on a flat die pad so that, at least one predetermined edge surface of the semiconductor chip extends or protrudes over a corresponding edge of the flat die pad. The predetermined edge of the die pad is arranged on the opposite side of a gate beneath a lead frame at the other side. The arrangement suppresses the formation of voids at a side surface of the semiconductor chip, e.g., the side surface opposite the gate at which resin is injected.

    摘要翻译： 传输模制半导体方法将半导体芯片布置在平坦的芯片焊盘上，使得半导体芯片的至少一个预定的边缘表面在平坦的芯片焊盘的相应边缘上延伸或突出。 芯片焊盘的预定边缘设置在另一侧的引线框架下面的栅极的相对侧上。 该布置抑制了在半导体芯片的侧表面（例如与注入树脂的栅极相对的侧表面）形成空隙。

    Compact standard cell
    9.
    发明申请
    Compact standard cell 有权
    紧凑的标准电池

    公开(公告)号：US20070300202A1

    公开(公告)日：2007-12-27

    申请号：US11785960

    申请日：2007-04-23

    申请人： Hirofumi Uchida

    发明人： Hirofumi Uchida

    IPC分类号： G06F17/50 ,  H03K19/00 ,  H01L29/00 ,  H01L25/00

    CPC分类号： H03K19/20 ,  H01L27/0207 ,  H01L27/11807 ,  H03K19/094

    摘要： A standard cell, placed between a power rail and a ground rail in an integrated circuit, has active areas with connecting arms that extend beneath the power rail and ground rail. The connecting arms conduct current between the power and ground rails and the source regions of transistors in the active areas. The connecting arms include segments extending from these source regions to points beneath the power and ground rails, and segments running longitudinally beneath the power and ground rails. The connecting arms replace metal wiring that would otherwise be required, enabling the size of the standard cell to be reduced.

    摘要翻译： 放置在集成电路中的电源轨和接地轨之间的标准电池具有连接臂的有源区域，其在电源轨和接地轨下方延伸。 连接臂在电源和接地导轨之间传导电流以及有源区域中的晶体管的源极区域。 连接臂包括从这些源区延伸到电源和接地轨下面的点的段，以及在电源和接地轨下方纵向延伸的段。 连接臂取代原本需要的金属布线，可以缩小标准电池的尺寸。

    Gate array integrated circuit including a unit cell basic layer having gate terminal regions allowing two contact pads to be disposed laterally
    10.
    发明申请
    Gate array integrated circuit including a unit cell basic layer having gate terminal regions allowing two contact pads to be disposed laterally 有权
    门阵列集成电路包括具有允许两个接触焊盘横向放置的栅极端子区的单元电池基底层

    公开(公告)号：US20060060889A1

    公开(公告)日：2006-03-23

    申请号：US11220657

    申请日：2005-09-08

    申请人： Hirofumi Uchida

    发明人： Hirofumi Uchida

    IPC分类号： H01L27/10

    CPC分类号： H01L27/11807 ,  H01L27/0207 ,  H01L27/092

    摘要： A gate array integrated circuit forming part of a semiconductor integrated circuit includes a basic layer of a unit cell in which a PMOS and an NMOS transistor are connected with a poly-silicon strip. The poly-silicon strip has gate terminal regions formed to laterally extend to allow two or more contact pads or through-holes to be disposed in each gate terminal region. It is thus possible to improve wiring efficiency and also micro-miniaturization and yield of the gate array integrated circuit. A layout method for a gate array integrated circuit is also provided.

    摘要翻译： 形成半导体集成电路的一部分的门阵列集成电路包括其中PMOS和NMOS晶体管与多晶硅条连接的单元电池的基本层。 多晶硅带具有形成为横向延伸的栅极端子区域，以允许在每个栅极端子区域中设置两个或更多个接触焊盘或通孔。 因此，可以提高栅极阵列集成电路的布线效率以及微小型化和成品率。 还提供了用于门阵列集成电路的布局方法。