公开(公告)号：US4796177A

公开(公告)日：1989-01-03

申请号：US935681

申请日：1986-11-07

申请人： Hisayuki Nishimura ,  Tomochika Shibata

发明人： Hisayuki Nishimura ,  Tomochika Shibata

IPC分类号： G06F12/02 ,  G06F12/06

CPC分类号： G06F12/0292

摘要： An address extension system is provided for generating a physical address by summing a segment starting point address and an offset. Conventionally, the content of a segment register is shifted by a predetermined amount and summed to the offset, and the address space and the segment starting point address are fixed. In contrast, the present address extension system includes a register for storing shift amount data and the shift amount is set in the register and shifted. An address extension system is also proposed wherein the shift amount is written in a predetermined bit of the segment register. As a result, the address space can be extended and the segment starting point address can be arbitrarily set.

摘要翻译： PCT No.PCT / JP86 / 00219 Sec。 371日期：1986年11月7日 102（e）1986年11月7日PCT PCT公布1986年4月30日PCT公布。 第WO86 / 06521号公报 日期：1986年11月6日。提供地址扩展系统，用于通过对段起点地址和偏移量相加来产生物理地址。 通常，片段寄存器的内容移位预定量并相加到偏移量，并且地址空间和段起始地址是固定的。 相反，本地址扩展系统包括用于存储移位量数据的寄存器，并且移位量被设置在寄存器中并移位。 还提出了一种地址扩展系统，其中移位量被写入段寄存器的预定位。 结果，可以扩展地址空间，并且可以任意设置段起始地址。

公开(公告)号：US5675467A

公开(公告)日：1997-10-07

申请号：US496112

申请日：1995-06-28

申请人： Hisayuki Nishimura ,  Shigeru Honda ,  Naohiro Shibata

发明人： Hisayuki Nishimura ,  Shigeru Honda ,  Naohiro Shibata

IPC分类号： G06F1/26 ,  G06F3/00 ,  H02H9/00 ,  H02M3/00 ,  H02H7/20

CPC分类号： H02H9/004

摘要： The present invention relates to a circuit mounting unit that can prevent a voltage drop and noise occurrence due to current inflow at the time of a hot insertion or withdrawal operation without mounting a capacitor with large capacitance on the side of a main unit. The circuit mounting unit includes a first voltage control unit that controls to increase gradually a voltage supplied to a load voltage converter from the main unit side to a predetermined voltage when the circuit mounting unit is exchangeably inserted into or pulled out of the main unit without halting electric power supplied from the main unit. The circuit mounting unit is mounted onto a printed wiring board on which various elements such as ICs and LSIs are previously mounted to form a predetermined circuit.

摘要翻译： 电路安装单元技术领域本发明涉及一种电路安装单元，其可以防止在热插拔操作时由于电流流入而导致的电压降和噪声发生，而不在主单元侧安装具有大电容的电容器。 电路安装单元包括第一电压控制单元，当电路安装单元可交换地插入或拉出主单元而不停止时，控制逐渐增加从主单元侧提供给负载电压转换器的电压至预定电压 从主机供电的电力。 电路安装单元安装在预先安装各种元件（例如IC和LSI）的印刷电路板上以形成预定电路。

公开(公告)号：US5514880A

公开(公告)日：1996-05-07

申请号：US142564

申请日：1993-10-28

申请人： Hisayuki Nishimura ,  Kazuyuki Sugahara ,  Shigenobu Maeda ,  Takashi Ipposhi ,  Yasuo Inoue ,  Toshiaki Iwamatsu ,  Mikio Ikeda ,  Tatsuya Kunikiyo ,  Junji Tateishi ,  Tadaharu Minato

发明人： Hisayuki Nishimura ,  Kazuyuki Sugahara ,  Shigenobu Maeda ,  Takashi Ipposhi ,  Yasuo Inoue ,  Toshiaki Iwamatsu ,  Mikio Ikeda ,  Tatsuya Kunikiyo ,  Junji Tateishi ,  Tadaharu Minato

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/78 ,  H01L29/786 ,  H01L29/10 ,  H01L29/06

CPC分类号： H01L27/11 ,  H01L27/1108 ,  H01L29/78654 ,  H01L27/1281 ,  Y10S257/903

摘要： In a miniaturized complete CMOS SRAM of a TFT load type, a field effect thin-film transistor (TFT) can achieve stable reading and writing operation of a memory cell and can reduce power consumption thereof. The field effect thin-film transistor formed on an insulator includes an active layer and a gate electrode. The gate electrode is formed on a channel region of the active layer with a gate insulating film therebetween. The active layer is formed of a channel region and source/drain regions. The channel region is formed of a monocrystal silicon layer and does not includes a grain boundary. The source/drain regions is formed of a polysilicon layer. The channel region has a density of crystal defects of less than 10.sup.9 pieces/cm.sup.2. The thin film transistor shows an ON current of 0.25 .mu.A/.mu.m per channel width of 1 .mu.m and an OFF current of 15 fA/.mu.m. The thin-film transistor can be applied to a p-channel MOS transistor serving as a load transistor in a memory cell of a CMOS type SRAM.

摘要翻译： 在TFT负载型的小型化的完全CMOS SRAM中，场效应薄膜晶体管（TFT）能够实现对存储单元的稳定的读/写操作并且可以降低其功耗。 形成在绝缘体上的场效应薄膜晶体管包括有源层和栅电极。 栅电极形成在有源层的沟道区上，其间具有栅极绝缘膜。 有源层由沟道区和源极/漏极区形成。 沟道区由单晶硅层形成，不包含晶界。 源/漏区由多晶硅层形成。 沟道区域的晶体缺陷密度小于109个/ cm 2。 薄膜晶体管的通道宽度为1μm，导通电流为0.25μA/μm，OFF电流为15fA /μm。 薄膜晶体管可以被施加到用作CMOS型SRAM的存储单元中的负载晶体管的p沟道MOS晶体管。

公开(公告)号：US5885858A

公开(公告)日：1999-03-23

申请号：US4169

申请日：1998-01-02

申请人： Hisayuki Nishimura ,  Shigeto Maegawa ,  Shigenobu Maeda

发明人： Hisayuki Nishimura ,  Shigeto Maegawa ,  Shigenobu Maeda

IPC分类号： H01L21/336 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L29/66765 ,  H01L29/78678

摘要： A thin-film transistor (3, 5a, 5b and 5c) is covered with a first silicon nitride film (9) formed by an LPCVD method. A first silicon oxide film (6) is formed on the first silicon nitride film (9). A silicon nitride film (7), i.e., passivation film which is formed by a plasma CVD method is provided on the first silicon oxide film (6).

摘要翻译： 薄膜晶体管（3,5a，5b和5c）被用LPCVD方法形成的第一氮化硅膜（9）覆盖。 在第一氮化硅膜（9）上形成第一氧化硅膜（6）。 在第一氧化硅膜（6）上设置氮化硅膜（7），即通过等离子体CVD法形成的钝化膜。

公开(公告)号：US5440168A

公开(公告)日：1995-08-08

申请号：US198058

申请日：1994-02-18

申请人： Hisayuki Nishimura ,  Shigeto Maegawa ,  Shigenobu Maeda

发明人： Hisayuki Nishimura ,  Shigeto Maegawa ,  Shigenobu Maeda

IPC分类号： H01L21/336 ,  H01L29/786 ,  H01L27/00 ,  H01L29/78

CPC分类号： H01L29/66765 ,  H01L29/78678

摘要： A thin-film transistor (3, 5a, 5b and 5c) is covered with a first silicon nitride film (9) formed by an LPCVD method. A first silicon oxide film (6) is formed on the first silicon nitride film (9). A second silicon nitride film (7), i.e., passivation film which is formed by a plasma CVD method is provided on the first silicon oxide film (6). In addition, the thin-film transistor includes a semiconductor layer covering a gate electrode. The semiconductor layer includes source, drain and active regions. The active region preferably includes a smaller amount of fluorine than the gate electrode.

摘要翻译： 薄膜晶体管（3,5a，5b和5c）被用LPCVD方法形成的第一氮化硅膜（9）覆盖。 在第一氮化硅膜（9）上形成第一氧化硅膜（6）。 在第一氧化硅膜（6）上设置第二氮化硅膜（7），即通过等离子体CVD法形成的钝化膜。 此外，薄膜晶体管包括覆盖栅电极的半导体层。 半导体层包括源极，漏极和有源区。 有源区优选包括比栅电极少的氟。

公开(公告)号：US4918599A

公开(公告)日：1990-04-17

申请号：US912094

申请日：1986-09-29

申请人： Shigeru Hashimoto ,  Yasuyuki Higashiura ,  Yoshiyasu Sugimura ,  Hisayuki Nishimura

发明人： Shigeru Hashimoto ,  Yasuyuki Higashiura ,  Yoshiyasu Sugimura ,  Hisayuki Nishimura

IPC分类号： G06F13/24 ,  G06F9/48 ,  G06F13/12 ,  G06F13/26

CPC分类号： G06F9/4818 ,  G06F13/26

摘要： An interrupt control system in which a main process device executes an interrupt process, having a high process priority. The process priority is registered in a table, corresponding to each interrupt generating source, and an intermediate process device receives an interrupt signal from each interrupt generating source, obtains the corresponding process priority from the table and informs the main process device of the interruption. Accordingly, the process priority can be easily changed, and the system has a small size because the interrupt circuit for the main process device is centralized.

摘要翻译： 一种主处理装置执行具有高处理优先级的中断处理的中断控制系统。 将处理优先级登记在与每个中断产生源对应的表中，并且中间处理装置从每个中断产生源接收中断信号，从表中获得相应的处理优先级并通知主处理装置中断。 因此，由于主处理装置的中断电路是集中的，因此可以容易地改变处理优先级，并且系统具有小的尺寸。

公开(公告)号：US06722572B2

公开(公告)日：2004-04-20

申请号：US10153644

申请日：2002-05-24

申请人： Akiko Ono ,  Hisayuki Nishimura

发明人： Akiko Ono ,  Hisayuki Nishimura

IPC分类号： G06K1906

CPC分类号： G07F7/1008 ,  G06K7/0034 ,  G06K19/10 ,  G06Q20/341 ,  G06Q20/3578 ,  G06Q20/4097

摘要： The present invention has an object of providing a recording medium control method, a data management apparatus, and a recording medium for managing data by duplicating the data in each of a plurality of recording media. Two IC cards are loaded into a data management apparatus. In duplicating data in the two loaded IC cards, the two IC cards store their card characteristic numbers for self-identification and the card characteristic number of each other's pair IC card. If the card characteristic number of the pair IC card stored in one IC card matches the card characteristic number of the other IC card, the two IC cards are controllable.

摘要翻译： 本发明的目的是提供一种记录介质控制方法，数据管理装置和用于通过复制多个记录介质中的每一个中的数据来管理数据的记录介质。 两个IC卡被加载到数据管理装置中。 在两个加载的IC卡中复制数据时，两个IC卡存储用于自身识别的卡特征号和对方的IC卡的卡特性号。 如果存储在一个IC卡中的对IC卡的卡特性号与其他IC卡的卡特性号匹配，则两个IC卡是可控的。

公开(公告)号：US6103556A

公开(公告)日：2000-08-15

申请号：US228234

申请日：1999-01-11

申请人： Hisayuki Nishimura ,  Shigeto Maegawa ,  Shigenobu Maeda

发明人： Hisayuki Nishimura ,  Shigeto Maegawa ,  Shigenobu Maeda

IPC分类号： H01L21/336 ,  H01L29/786 ,  H01L21/00 ,  H01L21/31

CPC分类号： H01L29/66765 ,  H01L29/78678

摘要： A thin-film transistor (3, 5a, 5b and 5c) is covered with a first silicon nitride film (9) formed by an LPCVD method. A first silicon oxide film (6) is formed on the first silicon nitride film (9). A silicon nitride film (7), i.e., passivation film which is formed by a plasma CVD method is provided on the first silicon oxide film (6).

摘要翻译： 薄膜晶体管（3,5a，5b和5c）被用LPCVD方法形成的第一氮化硅膜（9）覆盖。 在第一氮化硅膜（9）上形成第一氧化硅膜（6）。 在第一氧化硅膜（6）上设置氮化硅膜（7），即通过等离子体CVD法形成的钝化膜。

公开(公告)号：US5736438A

公开(公告)日：1998-04-07

申请号：US483411

申请日：1995-06-07

申请人： Hisayuki Nishimura ,  Kazuyuki Sugahara ,  Shigenobu Maeda ,  Takashi Ipposhi ,  Yasuo Inoue ,  Toshiaki Iwamatsu ,  Mikio Ikeda ,  Tatsuya Kunikiyo ,  Junji Tateishi ,  Tadaharu Minato

发明人： Hisayuki Nishimura ,  Kazuyuki Sugahara ,  Shigenobu Maeda ,  Takashi Ipposhi ,  Yasuo Inoue ,  Toshiaki Iwamatsu ,  Mikio Ikeda ,  Tatsuya Kunikiyo ,  Junji Tateishi ,  Tadaharu Minato

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/78 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L27/11 ,  H01L27/1108 ,  H01L29/78654 ,  H01L27/1281 ,  Y10S257/903

摘要： In a miniaturized complete CMOS SRAM of a TFT load type, a field effect thin-film transistor (TFT) can achieve stable reading and writing operation of a memory cell and can reduce power consumption thereof. The field effect thin-film transistor formed on an insulator includes an active layer and a gate electrode. The gate electrode is formed on a channel region of the active layer with a gate insulating film therebetween. The active layer is formed of a channel region and source/drain regions. The channel region is formed of a monocrystal silicon layer and does not includes a grain boundary. The source/drain regions is formed of a polysilicon layer. The channel region has a density of crystal defects of less than 10.sup.9 pieces/cm.sup.2. The thin film transistor shows an ON current of 0.25 .mu.A/.mu.m per channel width of 1 .mu.m and an OFF current of 15 fA/.mu.m. The thin-film transistor can be applied to a p-channel MOS transistor serving as a load transistor in a memory cell of a CMOS type SRAM.

摘要翻译： 在TFT负载型的小型化的完全CMOS SRAM中，场效应薄膜晶体管（TFT）能够实现对存储单元的稳定的读/写操作并且可以降低其功耗。 形成在绝缘体上的场效应薄膜晶体管包括有源层和栅电极。 栅电极形成在有源层的沟道区上，其间具有栅极绝缘膜。 有源层由沟道区和源极/漏极区形成。 沟道区由单晶硅层形成，不包含晶界。 源/漏区由多晶硅层形成。 沟道区域的晶体缺陷密度小于109个/ cm 2。 薄膜晶体管的通道宽度为1μm，导通电流为0.25μA/μm，OFF电流为15fA /μm。 薄膜晶体管可以被施加到用作CMOS型SRAM的存储单元中的负载晶体管的p沟道MOS晶体管。