公开(公告)号：US20040065900A1

公开(公告)日：2004-04-08

申请号：US10420740

申请日：2003-04-23

申请人： Hitachi, Ltd.

发明人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

IPC分类号： H01L031/072

CPC分类号： H01L27/0825 ,  H01L27/0259 ,  H01L29/7371 ,  H01L2224/48091 ,  H01L2224/73265 ,  H03K17/08146 ,  H03K17/615 ,  H01L2924/00014

摘要： The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

摘要翻译： 本发明旨在提高对半导体器件的破坏性。 具有连接在高输出的放大电路的输出（集电极和发射极）之间的达林顿的多个双极晶体管的保护电路与放大电路并联电连接。 放大电路具有彼此并联连接的多个单元HBT（异质结双极晶体管）。 保护电路具有两级配置，包括具有多个双极晶体管Q1至Q5的第一组保护电路和具有多个双极晶体管的第二组保护电路。

公开(公告)号：US20030218185A1

公开(公告)日：2003-11-27

申请号：US10409455

申请日：2003-04-09

申请人： Hitachi, Ltd.

发明人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

IPC分类号： H01L031/0328 ,  H01L031/072 ,  H01L021/331 ,  H01L021/8222

CPC分类号： H01L29/66318 ,  H01L29/0692 ,  H01L29/42304 ,  H01L29/7371 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16152 ,  H03F1/302 ,  H03F3/19 ,  H03F2203/21178

摘要： A first aspect of the invention is to realize a power amplifier having high power adding efficiency and high power gain at low cost. For that purpose, in a semiconductor device using an emitter top heterojunction bipolar transistor formed above a semiconductor substrate and having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. In this way, as a result of enabling to reduce base/collector junction capacitance per unit emitter area without using a collector top structure having complicated fabricating steps, a semiconductor device having high power adding efficiency and high-power gain and suitable for a power amplifier can be realized. A second aspect of the application is to provide a power amplifier enabling to reduce temperature dependency of power gain. For that purpose, in a multistage power amplifier including a first amplifier circuit 2 having one or more of bipolar transistors connected in parallel and arranged above a first semiconductor substrate and a second amplifier circuit 3 having one or more of bipolar transistors connected in parallel and arranged above a second semiconductor substrate, the bipolar transistor used in the first amplifier circuit 2 is provided with an emitter shape having a planar shape in a rectangular shape and the bipolar transistor used in the second amplifier circuit 3 is provided with an emitter shape in, for example, a ring-like shape and a base electrode thereof is present only on the inner side of the ring-like emitter.

摘要翻译： 本发明的第一方面是以低成本实现具有高功率增加效率和高功率增益的功率放大器。 为此，在半导体衬底上形成的具有平面形状为环状形状的发射极顶部异质结双极晶体管的半导体器件中，提供了仅在基板的内侧存在基极的结构 环状发射极 - 基极结区域。 以这种方式，由于能够在不使用具有复杂的制造步骤的集电极顶部结构的情况下，能够减小每单位发射极面积的基极/集电极结电容，所以具有高功率增加效率和高功率增益并适用于功率放大器的半导体器件 可以实现。 该应用的第二方面是提供能够降低功率增益的温度依赖性的功率放大器。 为此，在包括具有并联并且布置在第一半导体衬底之上的一个或多个双极晶体管的第一放大器电路2的多级功率放大器和具有一个或多个双极晶体管并联连接并布置的第二放大器电路3 在第二半导体衬底之上，在第一放大器电路2中使用的双极晶体管具有矩形形状的平面形状的发射极形状，并且在第二放大器电路3中使用的双极晶体管具有发射极形状，用于 例如，环状形状及其基极只存在于环状发射体的内侧。