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    Fuse structures, e-fuses comprising fuse structures, and semiconductor devices comprising e-fuses
    2.
    发明授权
    Fuse structures, e-fuses comprising fuse structures, and semiconductor devices comprising e-fuses 有权
    保险丝结构，包括保险丝结构的电子保险丝以及包括电子保险丝的半导体器件

    公开(公告)号：US08759945B2

    公开(公告)日：2014-06-24

    申请号：US13081949

    申请日：2011-04-07

    申请人： Seong-Ho Kim ,  Won-Mo Park ,  Gil-Sub Kim ,  Ho-Ju Song

    发明人： Seong-Ho Kim ,  Won-Mo Park ,  Gil-Sub Kim ,  Ho-Ju Song

    IPC分类号： H01L23/52 ,  H01L29/00

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A fuse structure, an e-fuse including the fuse structure and a semiconductor device including the e-fuse are disclosed. The fuse structure includes first and second electrodes extending in a first direction, and spaced a predetermined distance apart from each other and having one ends thereof facing each other, an insulation layer formed between the one end of the first electrode and the one end of the second electrode facing each other, and a conductive film overlapping portions of the first and second electrodes on the insulation layer and contacting the first electrode and the one end of the second electrode.

    摘要翻译： 公开了一种熔丝结构，包括熔丝结构的电熔丝和包括该电熔丝的半导体器件。 熔丝结构包括第一和第二电极，第一和第二电极沿第一方向延伸，彼此隔开预定的距离并且其一端面对彼此，形成在第一电极的一端和第一电极的一端之间的绝缘层 第二电极彼此面对，并且导电膜在绝缘层上重叠第一和第二电极的部分，并与第一电极和第二电极的一端接触。

    Fuse Structures, E-Fuses Comprising Fuse Structures, and Semiconductor Devices Comprising E-Fuses
    3.
    发明申请
    Fuse Structures, E-Fuses Comprising Fuse Structures, and Semiconductor Devices Comprising E-Fuses 有权
    保险丝结构，包括保险丝结构的电子保险丝以及包含电子保险丝的半导体器件

    公开(公告)号：US20110298086A1

    公开(公告)日：2011-12-08

    申请号：US13081949

    申请日：2011-04-07

    申请人： Seong-Ho Kim ,  Won-Mo Park ,  Gil-Sub Kim ,  Ho-Ju Song

    发明人： Seong-Ho Kim ,  Won-Mo Park ,  Gil-Sub Kim ,  Ho-Ju Song

    IPC分类号： H01L23/525

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A fuse structure, an e-fuse including the fuse structure and a semiconductor device including the e-fuse are disclosed. The fuse structure includes first and second electrodes extending in a first direction, and spaced a predetermined distance apart from each other and having one ends thereof facing each other, an insulation layer formed between the one end of the first electrode and the one end of the second electrode facing each other, and a conductive film overlapping portions of the first and second electrodes on the insulation layer and contacting the first electrode and the one end of the second electrode.

    摘要翻译： 公开了一种熔丝结构，包括熔丝结构的电熔丝和包括该电熔丝的半导体器件。 熔丝结构包括第一和第二电极，第一和第二电极沿第一方向延伸，彼此隔开预定的距离并且其一端面对彼此，形成在第一电极的一端和第一电极的一端之间的绝缘层 第二电极彼此面对，并且导电膜在绝缘层上重叠第一和第二电极的部分，并与第一电极和第二电极的一端接触。

    METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
    5.
    发明申请
    METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20100187101A1

    公开(公告)日：2010-07-29

    申请号：US12691967

    申请日：2010-01-22

    申请人： Gil-Sub Kim ,  Won-Mo Park ,  Seong-Ho Kim ,  Dong-Kwan Yang ,  Ho-Ju Song

    发明人： Gil-Sub Kim ,  Won-Mo Park ,  Seong-Ho Kim ,  Dong-Kwan Yang ,  Ho-Ju Song

    IPC分类号： C23C14/34

    CPC分类号： H01L27/10817 ,  H01L28/90

    摘要： In a semiconductor device and a method of manufacturing the semiconductor device, lower electrodes having cylindrical shapes are provided to be arranged repeatedly on a substrate. Upper surfaces of the lower electrodes are flat so that the lower electrodes have uniform heights. Supporting structures are provided between the lower electrodes to support the lower electrode, the supporting structure partially contacting outer surfaces of sidewalls of the lower electrodes that are arranged in a line. A dielectric layer is formed on surfaces of the lower electrodes and the supporting structures. An upper electrode is provided on the dielectric layer. The semiconductor device includes a capacitor having an improved capacitance. Further, the capacitor includes the support structure between the lower electrodes to prevent the adjacent lower electrodes from being short each other.

    摘要翻译： 在半导体器件和半导体器件的制造方法中，具有圆筒形状的下电极被重复配置在基板上。 下电极的上表面是平坦的，使得下电极具有均匀的高度。 在下部电极之间设置支撑结构以支撑下部电极，支撑结构部分地接触一排地布置在下部电极的侧壁的外表面。 在下电极和支撑结构的表面上形成电介质层。 在电介质层上设置上电极。 半导体器件包括具有改善的电容的电容器。 此外，电容器包括在下电极之间的支撑结构，以防止相邻的下电极彼此短路。

    Semiconductor memory device including a cylinder type storage node and a method of fabricating the same
    6.
    发明授权
    Semiconductor memory device including a cylinder type storage node and a method of fabricating the same 失效
    包括圆柱型存储节点的半导体存储器件及其制造方法

    公开(公告)号：US08058678B2

    公开(公告)日：2011-11-15

    申请号：US12537461

    申请日：2009-08-07

    申请人： Gil-Sub Kim ,  Won-Mo Park ,  Seong-Ho Kim ,  Dong-Kwan Yang

    发明人： Gil-Sub Kim ,  Won-Mo Park ,  Seong-Ho Kim ,  Dong-Kwan Yang

    IPC分类号： H01L27/108

    CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852

    摘要： Provided is a semiconductor memory device including cylinder type storage nodes and a method of fabricating the semiconductor memory device. The semiconductor memory device includes: a semiconductor substrate including switching devices; a recessed insulating layer including storage contact plugs therein, wherein the storage contact plugs are electrically connected to the switching devices and the recessed insulating layer exposes at least some portions of upper surfaces and side surfaces of the storage contact plugs. The semiconductor device further includes cylinder type storage nodes each having a lower electrode. The lower electrode contacting the at least some portions of the exposed upper surfaces and side surfaces of the storage node contact plugs.

    摘要翻译： 提供了一种包括圆筒型存储节点的半导体存储器件和制造半导体存储器件的方法。 半导体存储器件包括：包括开关器件的半导体衬底; 其中包括存储接触插塞的凹陷绝缘层，其中所述存储接触插塞电连接到所述开关装置，并且所述凹陷绝缘层暴露所述存储接触插塞的上表面和侧表面的至少一些部分。 半导体器件还包括各自具有下电极的圆筒型存储节点。 下部电极接触存储节点接触插塞的暴露的上表面和侧表面的至少一些部分。

    Fuse box guard rings including protrusions and methods of forming same
    7.
    发明授权
    Fuse box guard rings including protrusions and methods of forming same 有权
    保险丝盒保护环包括突起及其形成方法

    公开(公告)号：US08435840B2

    公开(公告)日：2013-05-07

    申请号：US12773444

    申请日：2010-05-04

    申请人： Seong-Ho Kim ,  Gil-Sub Kim ,  Dong-Kwan Yang

    发明人： Seong-Ho Kim ,  Gil-Sub Kim ,  Dong-Kwan Yang

    IPC分类号： H01L21/82 ,  H01L23/52

    CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region of the fuse box outside the fuse box guard ring. The fuse box guard ring can include protruding support members that protruding from an interior sidewall or from an exterior sidewall of the fuse box guard ring.

    摘要翻译： 包括在半导体器件中的结构可以包括保险丝盒保护环，其限定保险丝盒保护环内部的保险丝盒的内部区域，并且将保险丝盒的外部区域限定在保险丝盒保护环外部。 保险丝盒保护环可以包括从保险丝盒保护环的内侧壁或外侧壁突出的突出支撑构件。

    FUSE BOX GUARD RINGS INCLUDING PROTRUSIONS AND METHODS OF FORMING SAME
    8.
    发明申请
    FUSE BOX GUARD RINGS INCLUDING PROTRUSIONS AND METHODS OF FORMING SAME 有权
    保险丝盒防护罩，包括形状和其形成方法

    公开(公告)号：US20100283117A1

    公开(公告)日：2010-11-11

    申请号：US12773444

    申请日：2010-05-04

    申请人： Seong-Ho KIM ,  Gil-Sub Kim ,  Dong-Kwan Yang

    发明人： Seong-Ho KIM ,  Gil-Sub Kim ,  Dong-Kwan Yang

    IPC分类号： H01L29/06 ,  H01L21/302

    CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region of the fuse box outside the fuse box guard ring. The fuse box guard ring can include protruding support members that protruding from an interior sidewall or from an exterior sidewall of the fuse box guard ring.

    摘要翻译： 包括在半导体器件中的结构可以包括保险丝盒保护环，其限定保险丝盒保护环内部的保险丝盒的内部区域，并且将保险丝盒的外部区域限定在保险丝盒保护环外部。 保险丝盒保护环可以包括从保险丝盒保护环的内侧壁或外侧壁突出的突出支撑构件。

    Method of forming an isolation structure and method of forming a semiconductor device
    9.
    发明授权
    Method of forming an isolation structure and method of forming a semiconductor device 有权
    形成隔离结构的方法和形成半导体器件的方法

    公开(公告)号：US08697579B2

    公开(公告)日：2014-04-15

    申请号：US13362142

    申请日：2012-01-31

    申请人： Joo-Sung Park ,  Se-Myeong Jang ,  Gil-Sub Kim

    发明人： Joo-Sung Park ,  Se-Myeong Jang ,  Gil-Sub Kim

    IPC分类号： H01L21/311

    CPC分类号： H01L21/76229

    摘要： A method of forming an isolation structure includes forming a trench at an upper portion of a substrate, forming a first oxide layer on an inner wall of the trench, oxidizing a portion of the substrate adjacent to the trench to form a second oxide layer such that the portion of the substrate adjacent to the trench has the first oxide layer thereon, forming a nitride layer on the first oxide layer, and forming an insulation layer pattern on the nitride layer such that the insulation layer pattern fills a remaining portion of the trench.

    摘要翻译： 形成隔离结构的方法包括在衬底的上部形成沟槽，在沟槽的内壁上形成第一氧化物层，氧化邻近沟槽的衬底的一部分以形成第二氧化物层，使得 与沟槽相邻的衬底部分具有第一氧化物层，在第一氧化物层上形成氮化物层，并在氮化物层上形成绝缘层图案，使得绝缘层图案填充沟槽的剩余部分。

    Semiconductor memory device
    10.
    发明申请
    Semiconductor memory device 审中-公开
    半导体存储器件

    公开(公告)号：US20100237394A1

    公开(公告)日：2010-09-23

    申请号：US12659735

    申请日：2010-03-19

    申请人： Jai-Kyun Park ,  Hyeong-Sun Hong ,  Jong-Seop Lee ,  Yong-Il Kim ,  Yun-Sung Lee ,  Nam-Jung Kang ,  Jae-Hoon Song ,  Gil-Sub Kim

    发明人： Jai-Kyun Park ,  Hyeong-Sun Hong ,  Jong-Seop Lee ,  Yong-Il Kim ,  Yun-Sung Lee ,  Nam-Jung Kang ,  Jae-Hoon Song ,  Gil-Sub Kim

    IPC分类号： H01L27/108

    CPC分类号： H01L27/0207 ,  H01L27/10855

    摘要： A semiconductor memory device includes unit active regions, word lines extending in a first direction over the unit active region, bit lines extending on the word lines in a second direction substantially perpendicularly to the first direction, first pad contacts in contact with central portions of the unit active regions, the first pad contacts being arranged between the word lines, direct contacts electrically connected between the first pad contacts and the bit lines, second pad contacts in contact with edge portions of the unit active regions, the second pad contacts being arranged between the word lines and between the bit lines, buried contacts electrically connected to the second pad contacts, and capacitors electrically connected to the buried contacts.

    摘要翻译： 半导体存储器件包括单元有源区域，在单元有源区域上沿第一方向延伸的字线，沿着基本垂直于第一方向的第二方向在字线上延伸的位线，与第一方向的中心部分接触的第一焊盘触点 所述第一焊盘触点布置在所述字线之间，直接触点电连接在所述第一焊盘触点和所述位线之间，所述第二焊盘触点与所述单元有源区域的边缘部分接触，所述第二焊盘触点布置在 字线和位线之间，电连接到第二焊盘触点的埋入触点，以及电连接到埋入触点的电容器。