Semiconductor memory device
    1.
    发明申请
    Semiconductor memory device 审中-公开
    半导体存储器件

    公开(公告)号:US20100237394A1

    公开(公告)日:2010-09-23

    申请号:US12659735

    申请日:2010-03-19

    IPC分类号: H01L27/108

    CPC分类号: H01L27/0207 H01L27/10855

    摘要: A semiconductor memory device includes unit active regions, word lines extending in a first direction over the unit active region, bit lines extending on the word lines in a second direction substantially perpendicularly to the first direction, first pad contacts in contact with central portions of the unit active regions, the first pad contacts being arranged between the word lines, direct contacts electrically connected between the first pad contacts and the bit lines, second pad contacts in contact with edge portions of the unit active regions, the second pad contacts being arranged between the word lines and between the bit lines, buried contacts electrically connected to the second pad contacts, and capacitors electrically connected to the buried contacts.

    摘要翻译: 半导体存储器件包括单元有源区域,在单元有源区域上沿第一方向延伸的字线,沿着基本垂直于第一方向的第二方向在字线上延伸的位线,与第一方向的中心部分接触的第一焊盘触点 所述第一焊盘触点布置在所述字线之间,直接触点电连接在所述第一焊盘触点和所述位线之间,所述第二焊盘触点与所述单元有源区域的边缘部分接触,所述第二焊盘触点布置在 字线和位线之间,电连接到第二焊盘触点的埋入触点,以及电连接到埋入触点的电容器。

    Semiconductor device and method of forming the same
    4.
    发明授权
    Semiconductor device and method of forming the same 有权
    半导体器件及其形成方法

    公开(公告)号:US08120123B2

    公开(公告)日:2012-02-21

    申请号:US12662150

    申请日:2010-04-01

    IPC分类号: H01L23/52 H01L27/088

    摘要: A semiconductor device, and a method of forming the same, includes forming a cell bit line pattern and a peripheral gate pattern on a semiconductor substrate. The cell bit line pattern may be formed on an inactive region adjacent to a cell active region of the semiconductor substrate. The peripheral gate pattern may be disposed on a peripheral active region of the semiconductor substrate. A cell contact plug may be formed between the cell bit line pattern and the cell active region. A peripheral contact plug may be formed on the peripheral active region on a side of the peripheral gate pattern. An insulating layer may be formed to expose top surfaces of the cell bit line pattern, the peripheral gate pattern, and the cell and peripheral contact plugs at substantially the same level.

    摘要翻译: 半导体器件及其形成方法包括在半导体衬底上形成单元位线图案和外围栅极图案。 单元位线图案可以形成在与半导体基板的单元有源区域相邻的非活性区域上。 外围栅极图案可以设置在半导体衬底的外围有源区上。 细胞接触插塞可以形成在细胞位线图案和细胞活性区域之间。 周边接触插塞可以形成在外围栅极图案侧的外围有源区域上。 可以形成绝缘层,以将电池位线图形,外围栅极图案,电池和外围接触插头的顶表面暴露在基本上相同的水平。

    Semiconductor device and method of forming the same
    5.
    发明申请
    Semiconductor device and method of forming the same 有权
    半导体器件及其形成方法

    公开(公告)号:US20100193880A1

    公开(公告)日:2010-08-05

    申请号:US12662150

    申请日:2010-04-01

    IPC分类号: H01L23/52 H01L27/088

    摘要: A semiconductor device, and a method of forming the same, includes forming a cell bit line pattern and a peripheral gate pattern on a semiconductor substrate. The cell bit line pattern may be formed on an inactive region adjacent to a cell active region of the semiconductor substrate. The peripheral gate pattern may be disposed on a peripheral active region of the semiconductor substrate. A cell contact plug may be formed between the cell bit line pattern and the cell active region. A peripheral contact plug may be formed on the peripheral active region on a side of the peripheral gate pattern. An insulating layer may be formed to expose top surfaces of the cell bit line pattern, the peripheral gate pattern, and the cell and peripheral contact plugs at substantially the same level.

    摘要翻译: 半导体器件及其形成方法包括在半导体衬底上形成单元位线图案和外围栅极图案。 单元位线图案可以形成在与半导体基板的单元有源区域相邻的非活性区域上。 外围栅极图案可以设置在半导体衬底的外围有源区上。 细胞接触插塞可以形成在细胞位线图案和细胞活性区域之间。 周边接触插塞可以形成在外围栅极图案侧的外围有源区域上。 可以形成绝缘层,以将电池位线图形,外围栅极图案,电池和外围接触插头的顶表面暴露在基本上相同的水平。

    Liquid crystal display with light emitting diode backlight assembly and liquid crystal display thereof
    6.
    发明授权
    Liquid crystal display with light emitting diode backlight assembly and liquid crystal display thereof 有权
    具有发光二极管背光组件的液晶显示器及其液晶显示器

    公开(公告)号:US08553170B2

    公开(公告)日:2013-10-08

    申请号:US12419376

    申请日:2009-04-07

    摘要: A light emitting diode (“LED”) backlight assembly. The LED backlight assembly has a bottom container which has a bottom plate and a side edge surrounding the bottom plate, a plurality of light emitting diode printed circuit boards (“LED-PCBs”) on the bottom plate, and a connector which is closely located to edge located LEDs. The connector of the LED-PCB is closely located to an LED driving board, which is disposed at a lateral space of a lateral part of the bottom container to limit a vertical thickness of the backlight light assembly.

    摘要翻译: 发光二极管(“LED”)背光组件。 LED背光组件具有底部容器,底部容纳有围绕底板的侧边缘,底板上的多个发光二极管印刷电路板(“LED-PCB”)以及紧邻的连接器 到边缘定位的LED。 LED-PCB的连接器位于LED驱动板上,LED驱动板设置在底部容器的侧部的侧向空间中,以限制背光灯组件的垂直厚度。

    Semiconductor devices including buried gate electrodes
    7.
    发明授权
    Semiconductor devices including buried gate electrodes 有权
    包括掩埋栅电极的半导体器件

    公开(公告)号:US08450786B2

    公开(公告)日:2013-05-28

    申请号:US13241716

    申请日:2011-09-23

    IPC分类号: H01L27/108

    摘要: A semiconductor device capable of reducing a thickness, an electronic product employing the same, and a method of fabricating the same are provided. The method of fabricating a semiconductor device includes preparing a semiconductor substrate having first and second active regions. A first transistor in the first active region includes a first gate pattern and first impurity regions. A second transistor the second active region includes a second gate pattern and second impurity regions. A first conductive pattern is on the first transistor, wherein at least a part of the first conductive pattern is disposed at a same distance from an upper surface of the semiconductor substrate as at least a part of the second gate pattern. The first conductive pattern may be formed on the first transistor while the second transistor is formed.

    摘要翻译: 提供了能够减小厚度的半导体器件,采用该半导体器件的电子产品及其制造方法。 制造半导体器件的方法包括制备具有第一和第二有源区的半导体衬底。 第一有源区中的第一晶体管包括第一栅极图案和第一杂质区域。 第二晶体管,第二有源区包括第二栅极图案和第二杂质区域。 第一导电图案在第一晶体管上,其中第一导电图案的至少一部分设置在与半导体衬底的上表面相同的距离处,作为第二栅极图案的至少一部分。 第一导电图案可以形成在第一晶体管上,而形成第二晶体管。

    Dome switch structure for a portable terminal
    9.
    发明授权
    Dome switch structure for a portable terminal 有权
    便携式终端的圆顶开关结构

    公开(公告)号:US08269124B2

    公开(公告)日:2012-09-18

    申请号:US12696998

    申请日:2010-01-29

    IPC分类号: H01H1/10

    摘要: Disclosed is a portable terminal, including, a first conductor formed on one surface of a board and having a contact surface, a second conductor formed at an outer periphery of the first conductor and having a support surface, and a metal dome supported by the support surface and transformed responsive to a key being pressed so as to contact the contact surface, wherein the contact surface is located at a position lower than the support surface so as to increase a transformation stroke of the metal dome.

    摘要翻译: 公开了一种便携式终端,包括形成在板的一个表面上并具有接触表面的第一导体,形成在第一导体的外周并具有支撑表面的第二导体,以及由支撑体支撑的金属圆顶 响应于被按压的键以与接触表面接触,其中接触表面位于比支撑表面低的位置,以增加金属圆顶的变换行程。