公开(公告)号：US20120102310A1

公开(公告)日：2012-04-26

申请号：US13239454

申请日：2011-09-22

申请人： Hojun SHIM ,  Woo-Sung Cho

发明人： Hojun SHIM ,  Woo-Sung Cho

IPC分类号： G06F9/00 ,  G11C16/30 ,  G11C5/14

CPC分类号： G11C16/22 ,  G11C5/143

摘要： Provided is a memory system that includes at least one nonvolatile memory device, a plurality of power lines and a plurality of power domains. The power lines receive a power source voltage. The power domains are respectively connected to the power lines. A reset signal is generated by using voltages which are detected from the power lines. The memory system and a reset method thereof detect the voltages of all power lines to generate a reset signal, and thus enhance reliability of data when a power is shut off.

摘要翻译： 提供了一种包括至少一个非易失性存储器件，多个电源线和多个电源域的存储器系统。 电源线接收电源电压。 电力域分别连接到电力线。 通过使用从电力线检测的电压来产生复位信号。 存储器系统及其复位方法检测所有电力线的电压以产生复位信号，从而在断电时提高数据的可靠性。

公开(公告)号：US20120099392A1

公开(公告)日：2012-04-26

申请号：US13238055

申请日：2011-09-21

申请人： Hojun SHIM ,  Woo-Sung CHO

发明人： Hojun SHIM ,  Woo-Sung CHO

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C16/30

摘要： A data storage device including a reset circuit and a method of resetting thereof includes a memory device to receive a driving voltage through a power terminal thereof, a voltage regulator to adjust an external voltage to provide the adjusted voltage to the power terminal of the memory device, and a reset circuit to discharge an enable terminal of the voltage regulator or the power terminal of the memory device according to a change of the external voltage.

摘要翻译： 包括复位电路的数据存储装置及其复位方法包括：通过其电源端接收驱动电压的存储装置;调节外部电压的电压调节器，用于向存储装置的电源端提供经调整的电压; 以及复位电路，用于根据外部电压的变化对电压调节器的使能端子或存储器件的电源端子进行放电。

公开(公告)号：US20140149607A1

公开(公告)日：2014-05-29

申请号：US14038892

申请日：2013-09-27

申请人： Hojun SHIM ,  Eunchan KIM

发明人： Hojun SHIM ,  Eunchan KIM

IPC分类号： G06F3/06 ,  G06F13/24 ,  G06F13/28

CPC分类号： G06F3/0659 ,  G06F3/061 ,  G06F3/0689 ,  G06F13/24 ,  G06F13/28

摘要： A data transfer method of a storage device which includes a host bus adaptor to communicate with an external host via a first interface and to communicate internally via a second interface is provided. The data transfer method may include issuing a write command and a read command to the host bus adaptor; performing a read direct memory access operation using the first interface in response to the write command and simultaneously performing a write direct memory access operation using the second interface in response to the read command; and generating frame information structure (FIS) sequences according to the second interface in response to the issued write command and the issued read command. The first interface may perform a full duplex data transfer and the second interface may perform a half-duplex data transfer.

摘要翻译： 提供一种存储装置的数据传输方法，其包括通过第一接口与外部主机进行通信并经由第二接口在内部进行通信的主机总线适配器。 数据传输方法可以包括向主机总线适配器发出写入命令和读取命令; 响应于写入命令，使用第一接口执行读取直接存储器访问操作，并响应于读取命令同时执行使用第二接口的写入直接存储器访问操作; 以及响应于发出的写入命令和发出的读取命令，根据第二接口生成帧信息结构（FIS）序列。 第一接口可以执行全双工数据传输，并且第二接口可以执行半双工数据传输。

公开(公告)号：US20130151760A1

公开(公告)日：2013-06-13

申请号：US13601105

申请日：2012-08-31

申请人： Seung-Duk CHO ,  Hojun SHIM ,  Kijo JUNG

发明人： Seung-Duk CHO ,  Hojun SHIM ,  Kijo JUNG

IPC分类号： G06F12/00

CPC分类号： G06F3/0647 ,  G06F1/30 ,  G06F3/0659 ,  G06F12/0246 ,  G11C7/24

摘要： Disclosed is a memory system which includes a nonvolatile memory device configured to store data information; and a memory controller configured to control the nonvolatile memory device. The memory controller provides the nonvolatile memory device with a program command sequence including program speed information according to an urgency level of an internally requested program operation.

摘要翻译： 本发明公开了一种存储系统，包括配置为存储数据信息的非易失性存储器件; 以及配置为控制非易失性存储器件的存储器控​​制器。 存储器控制器根据内部请求的程序操作的紧急程度向非易失性存储器件提供包括程序速度信息的程序命令序列。

公开(公告)号：US20130097366A1

公开(公告)日：2013-04-18

申请号：US13615470

申请日：2012-09-13

申请人： Hojun SHIM

发明人： Hojun SHIM

IPC分类号： G06F12/00

CPC分类号： G06F3/0626 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7203

摘要： Provided are a storage device and a user device used by connecting to the user device. The storage device may include a nonvolatile memory and a control unit configured to control the nonvolatile memory. When write data is received from the host, the control unit outputs a first response signal including information indicating whether the write data is successfully received. When the write data is stored in the nonvolatile memory, the control unit outputs a second response signal including on whether the write data is successfully stored in the nonvolatile memory. Since the storage device does not require a program backup memory, it may be implemented in a small area.

摘要翻译： 提供了通过连接到用户设备而使用的存储设备和用户设备。 存储装置可以包括非易失性存储器和被配置为控制非易失性存储器的控制单元。 当从主机接收到写入数据时，控制单元输出包括指示写入数据是否被成功接收的信息的第一响应信号。 当写入数据存储在非易失性存储器中时，控制单元输出包括写入数据是否成功存储在非易失性存储器中的第二响应信号。 由于存储设备不需要程序备份存储器，所以可以在小的区域中实现。

公开(公告)号：US20120062187A1

公开(公告)日：2012-03-15

申请号：US13217962

申请日：2011-08-25

申请人： Hojun SHIM

发明人： Hojun SHIM

IPC分类号： H02J7/00

CPC分类号： H02J7/0016 ,  H02H3/10 ,  H02J7/345

摘要： An auxiliary power device includes an auxiliary power source having first and second charging cells connected in series, a cell balance circuit configured to sense a charging voltage between the first and second charging cells, generate a balance voltage based on the sensed charging voltage, and applies the generated balance voltage between the first and second charging cells, and a microprocessor configured to diagnose the first and second charging cells based on the sensed charging cells and control the cell balance circuit.

摘要翻译： 辅助电源装置包括具有串联连接的第一和第二充电单元的辅助电源，电池平衡电路，被配置为感测第一和第二充电单元之间的充电电压，基于感测的充电电压产生平衡电压，并应用 第一和第二充电单元之间产生的平衡电压以及被配置为基于所感测的充电单元诊断第一和第二充电单元并控制单元平衡电路的微处理器。