公开(公告)号：US09147020B2

公开(公告)日：2015-09-29

申请号：US13091803

申请日：2011-04-21

申请人： Hsiu-Ying Cho ,  Jiun-Kai Huang ,  Wen-Sheh Huang ,  Chin-Wei Kuo ,  Min-Chie Jeng

发明人： Hsiu-Ying Cho ,  Jiun-Kai Huang ,  Wen-Sheh Huang ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC分类号： H01L23/522 ,  G06F17/50 ,  H01L21/66

CPC分类号： G06F17/5036 ,  H01L22/34

摘要： A method includes simulating characteristics of a first transmission line having a first length, and simulating characteristics of a second transmission line having a second length greater than the first length. A calculation is then performed on the characteristics of the first transmission line and the characteristics of the second transmission line to generate intrinsic characteristics of a third transmission line having a length equal to a difference of the second length and the first length.

摘要翻译： 一种方法包括模拟具有第一长度的第一传输线的特性，以及模拟具有大于第一长度的第二长度的第二传输线的特性。 然后对第一传输线的特性和第二传输线的特性执行计算，以产生具有等于第二长度和第一长度的差的长度的第三传输线的固有特性。

公开(公告)号：US20120267626A1

公开(公告)日：2012-10-25

申请号：US13091803

申请日：2011-04-21

申请人： Hsiu-Ying Cho ,  Jiun-Kai Huang ,  Wen-Sheh Huang ,  Chin-Wei Kuo ,  Min-Chie Jeng

发明人： Hsiu-Ying Cho ,  Jiun-Kai Huang ,  Wen-Sheh Huang ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC分类号： H01L23/522 ,  H01L21/66 ,  G01R31/08

CPC分类号： G06F17/5036 ,  H01L22/34

摘要： A method includes simulating characteristics of a first transmission line having a first length, and simulating characteristics of a second transmission line having a second length greater than the first length. A calculation is then performed on the characteristics of the first transmission line and the characteristics of the second transmission line to generate intrinsic characteristics of a third transmission line having a length equal to a difference of the second length and the first length.

摘要翻译： 一种方法包括模拟具有第一长度的第一传输线的特性，以及模拟具有大于第一长度的第二长度的第二传输线的特性。 然后对第一传输线的特性和第二传输线的特性执行计算，以产生具有等于第二长度和第一长度的差的长度的第三传输线的固有特性。

公开(公告)号：US09508480B2

公开(公告)日：2016-11-29

申请号：US13222665

申请日：2011-08-31

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01F5/00 ,  H01F27/28 ,  H01F17/00

CPC分类号： H01F17/0013 ,  H01F2017/0073 ,  H01F2017/008 ,  H01F2017/0086

摘要： A vertical inductor structure in a semiconductor device includes a plurality of vertically oriented spirals that produce magnetic field in a dielectric material above the surface of a semiconductor substrate thereby preventing any eddy currents from propagating in the substrate. An inductor shield structure is also provided. The inductor shield structure is formed over the substrate surface and between an inductor such as the vertical inductor structure or other inductor types and also prevents eddy currents from being induced in the substrate. The inductor shield may surround the inductor to various degrees.

摘要翻译： 半导体器件中的垂直电感器结构包括多个垂直取向的螺旋，其在半导体衬底的表面上方的电介质材料中产生磁场，从而防止任何涡流在衬底中传播。 还提供电感器屏蔽结构。 电感器屏蔽结构形成在衬底表面上和电感器之间，例如垂直电感器结构或其它电感器类型，并且还防止在衬底中感应涡流。 电感器屏蔽可以以不同程度围绕电感器。

公开(公告)号：US09143101B2

公开(公告)日：2015-09-22

申请号：US13412844

申请日：2012-03-06

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01L27/06 ,  H03F3/45

CPC分类号： H03F3/45179

摘要： The present disclosure relates to a semiconductor device, such as a transistor. The device includes a gate terminal, a source terminal, a drain terminal, a transconductance component, and a boost component. The gate terminal is configured to receive a bias voltage. The drain terminal is coupled to the boost component. The transconductance component is coupled to the gate terminal, the source terminal and the drain terminal and provides an output current proportional to the bias voltage. The boost component is coupled to the transconductance component and boosts the output current at a selected frequency range.

摘要翻译： 本公开涉及一种诸如晶体管的半导体器件。 该器件包括栅极端子，源极端子，漏极端子，跨导部件和升压部件。 栅极端子被配置为接收偏置电压。 漏极端子耦合到升压组件。 跨导元件耦合到栅极端子，源极端子和漏极端子，并提供与偏压成比例的输出电流。 升压组件耦合到跨导组件，并在选定的频率范围内提升输出电流。

公开(公告)号：US08791784B2

公开(公告)日：2014-07-29

申请号：US13212976

申请日：2011-08-18

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01F5/00 ,  H01F27/28

CPC分类号： H01L23/5227 ,  H01L23/5223 ,  H01L23/5225 ,  H01L2924/0002 ,  Y10T29/49165 ,  H01L2924/00

摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a substrate that spans in an X-direction and a Y-direction that is orthogonal to the X-direction. The semiconductor device includes an interconnect structure formed over the substrate in a Z-direction that is orthogonal to both the X-direction and the Y-direction. The interconnect structure includes a plurality of metal lines interconnected together in the Z-direction by a plurality of vias. The interconnect structure contains a transformer device that includes a primary coil and a secondary coil. The primary coil and the secondary coil are each wound at least partially in the Z-direction.

摘要翻译： 本发明提供一种半导体器件。 半导体器件包括跨越与X方向正交的X方向和Y方向的衬底。 半导体器件包括在与X方向和Y方向正交的Z方向上形成在衬底上的互连结构。 互连结构包括通过多个通孔在Z方向上互连在一起的多个金属线。 互连结构包括一个包括初级线圈和次级线圈的变压器装置。 初级线圈和次级线圈各自至少部分地沿Z方向缠绕。

公开(公告)号：US08405482B2

公开(公告)日：2013-03-26

申请号：US13032823

申请日：2011-02-23

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01F5/00 ,  H01F27/28 ,  H01L27/08

CPC分类号： H01L28/10 ,  H01L23/5225 ,  H01L23/5227 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit includes a substrate having a surface. An inductor is disposed over the surface of the substrate. The inductor is operable to generate a magnetic field through itself that is substantially parallel with the surface.

摘要翻译： 集成电路包括具有表面的基板。 电感器设置在衬底的表面上。 电感器可操作以产生通过其本来基本平行于表面的磁场。

公开(公告)号：US20130043968A1

公开(公告)日：2013-02-21

申请号：US13212976

申请日：2011-08-18

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01F5/00 ,  H01K3/10 ,  H01F30/00

CPC分类号： H01L23/5227 ,  H01L23/5223 ,  H01L23/5225 ,  H01L2924/0002 ,  Y10T29/49165 ,  H01L2924/00

摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a substrate that spans in an X-direction and a Y-direction that is orthogonal to the X-direction. The semiconductor device includes an interconnect structure formed over the substrate in a Z-direction that is orthogonal to both the X-direction and the Y-direction. The interconnect structure includes a plurality of metal lines interconnected together in the Z-direction by a plurality of vias. The interconnect structure contains a transformer device that includes a primary coil and a secondary coil. The primary coil and the secondary coil are each wound at least partially in the Z-direction.

摘要翻译： 本发明提供一种半导体器件。 半导体器件包括跨越与X方向正交的X方向和Y方向的衬底。 半导体器件包括在与X方向和Y方向正交的Z方向上形成在衬底上的互连结构。 互连结构包括通过多个通孔在Z方向上互连在一起的多个金属线。 互连结构包括一个包括初级线圈和次级线圈的变压器装置。 初级线圈和次级线圈各自至少部分地沿Z方向缠绕。

公开(公告)号：US08618826B2

公开(公告)日：2013-12-31

申请号：US13029328

申请日：2011-02-17

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： G01R31/26 ,  G01R31/02

CPC分类号： G01R31/2846 ,  G01R31/27 ,  G01R31/2884 ,  H01L22/34

摘要： A short dummy test structure is disclosed, including a grounded shield layer above a substrate, at least two signal test pads, and a signal transmission line above the grounded shield layer and between the two signal test pads, wherein the signal transmission line is electrically coupled to the grounded shield layer. In one embodiment, the signal transmission line has a smaller total length than a total length of a corresponding signal transmission line and a device-under-test (DUT) of a test structure including the DUT. A de-embedding apparatus and method of de-embedding utilizing such a short dummy test structure are also disclosed.

摘要翻译： 公开了一种短的虚拟测试结构，其包括在衬底上方的接地屏蔽层，至少两个信号测试焊盘以及接地屏蔽层之上和两个信号测试焊盘之间的信号传输线，其中信号传输线电耦合 到接地屏蔽层。 在一个实施例中，信号传输线具有比包括DUT的测试结构的对应信号传输线和被测器件（DUT）的总长度更小的总长度。 还公开了一种使用这种短虚拟测试结构去嵌入的去嵌入设备和方法。

公开(公告)号：US20130093045A1

公开(公告)日：2013-04-18

申请号：US13272866

申请日：2011-10-13

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01L29/92 ,  H01L21/768

CPC分类号： H01L23/5227 ,  H01F27/2885 ,  H01F2027/2809 ,  H01L21/02 ,  H01L21/20 ,  H01L23/5223 ,  H01L23/5225 ,  H01L27/016 ,  H01L27/12 ,  H01L28/10 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure involves a semiconductor device. The semiconductor device includes a substrate; a capacitor disposed over the substrate; an inductor disposed over the substrate and having a coil feature surrounding the capacitor; and a shielding structure over the substrate and configured around the coil feature.

摘要翻译： 本发明涉及半导体器件。 半导体器件包括衬底; 设置在所述基板上的电容器; 设置在所述衬底上并且具有围绕所述电容器的线圈特征的电感器; 以及屏蔽结构，并且围绕线圈特征构造。

公开(公告)号：US08274343B2

公开(公告)日：2012-09-25

申请号：US13273815

申请日：2011-10-14

申请人： Hsiu-Ying Cho

发明人： Hsiu-Ying Cho

IPC分类号： H01P3/08

CPC分类号： H01P3/003

摘要： An integrated circuit structure includes a semiconductor substrate; an interconnect structure over the semiconductor substrate; a first dielectric layer over the semiconductor substrate and in the interconnect structure; a second dielectric layer in the interconnect structure and over the first dielectric layer; and a wave-guide. The wave-guide includes a first portion in the first dielectric layer and a second portion in the second dielectric layer. The first portion adjoins the second portion.

摘要翻译： 集成电路结构包括半导体衬底; 半导体衬底上的互连结构; 在所述半导体衬底上和所述互连结构中的第一电介质层; 所述互连结构中的第二介电层和所述第一介电层上方; 和波导。 波导包括第一电介质层中的第一部分和第二介电层中的第二部分。 第一部分邻接第二部分。