公开(公告)号：US08003522B2

公开(公告)日：2011-08-23

申请号：US12327425

申请日：2008-12-03

申请人： Hui Chen ,  Ihsiu Ho ,  Stacy W. Hall ,  Briant Harward ,  Hossein Paravi

发明人： Hui Chen ,  Ihsiu Ho ,  Stacy W. Hall ,  Briant Harward ,  Hossein Paravi

IPC分类号： H01L21/00

CPC分类号： H01L29/7813 ,  H01L21/3085 ,  H01L21/3086 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397

摘要： A method for forming a semiconductor structure includes the following steps. A hard mask layer is formed over a semiconductor region. The hard mask layer has inner portions that are thinner than its outer portions, and the inner portions define an exposed surface area of the semiconductor region. A portion of the semiconductor region is removed through the exposed surface area of the semiconductor region. The thinner portions of the hard mask layer are removed to expose surface areas of the semiconductor region underlying the thinner portions. An additional portion of the semiconductor region is removed through all exposed surface areas of the semiconductor region thereby forming a trench having an upper portion that is wider than its lower portion.

摘要翻译： 一种形成半导体结构的方法包括以下步骤。 在半导体区域上形成硬掩模层。 硬掩模层具有比其外部部分薄的内部部分，并且内部部分限定半导体区域的暴露的表面积。 通过半导体区域的暴露的表面区域去除半导体区域的一部分。 去除硬掩模层的较薄部分以暴露较薄部分下面的半导体区域的表面区域。 通过半导体区域的所有暴露的表面区域去除半导体区域的附加部分，从而形成具有比下部更宽的上部的沟槽。

公开(公告)号：US20100003823A1

公开(公告)日：2010-01-07

申请号：US12327425

申请日：2008-12-03

申请人： Hui Chen ,  Ihsiu Ho ,  Stacy W. Hall ,  Briant Harward ,  Hossein Paravi

发明人： Hui Chen ,  Ihsiu Ho ,  Stacy W. Hall ,  Briant Harward ,  Hossein Paravi

IPC分类号： H01L21/308

CPC分类号： H01L29/7813 ,  H01L21/3085 ,  H01L21/3086 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397

摘要： A method for forming a semiconductor structure includes the following steps. A hard mask layer is formed over a semiconductor region. The hard mask layer has inner portions that are thinner than its outer portions, and the inner portions define an exposed surface area of the semiconductor region. A portion of the semiconductor region is removed through the exposed surface area of the semiconductor region. The thinner portions of the hard mask layer are removed to expose surface areas of the semiconductor region underlying the thinner portions. An additional portion of the semiconductor region is removed through all exposed surface areas of the semiconductor region thereby forming a trench having an upper portion that is wider than its lower portion.

摘要翻译： 一种形成半导体结构的方法包括以下步骤。 在半导体区域上形成硬掩模层。 硬掩模层具有比其外部部分薄的内部部分，并且内部部分限定半导体区域的暴露的表面积。 通过半导体区域的暴露的表面区域去除半导体区域的一部分。 去除硬掩模层的较薄部分以暴露较薄部分下面的半导体区域的表面区域。 通过半导体区域的所有暴露的表面区域去除半导体区域的附加部分，从而形成具有比下部更宽的上部的沟槽。

公开(公告)号：US08815744B2

公开(公告)日：2014-08-26

申请号：US12109302

申请日：2008-04-24

申请人： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

发明人： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

IPC分类号： H01L21/311

CPC分类号： H01L21/3065 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/7827

摘要： A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.

摘要翻译： 一种形成半导体结构的方法包括以下步骤。 在半导体区域中使用掩模层形成沟槽，使得沟槽具有第一深度，沿其底部的第一宽度和具有第一斜率的侧壁。 去除掩模层，并且执行斜面蚀刻以使沟槽的侧壁逐渐变细，使得侧壁具有小于第一斜率的第二斜率。

公开(公告)号：US08772169B2

公开(公告)日：2014-07-08

申请号：US12109302

申请日：2008-04-24

申请人： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

发明人： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

IPC分类号： H01L21/311

摘要： A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.

公开(公告)号：US20090269896A1

公开(公告)日：2009-10-29

申请号：US12109302

申请日：2008-04-24

申请人： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

发明人： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

IPC分类号： H01L21/336

CPC分类号： H01L21/3065 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/7827

摘要： A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.

摘要翻译： 一种形成半导体结构的方法包括以下步骤。 在半导体区域中使用掩模层形成沟槽，使得沟槽具有第一深度，沿其底部的第一宽度和具有第一斜率的侧壁。 去除掩模层，并且执行斜面蚀刻以使沟槽的侧壁逐渐变细，使得侧壁具有小于第一斜率的第二斜率。