Correlation apparatus based on symmetry of correlation coefficient and method thereof
    1.
    发明授权
    Correlation apparatus based on symmetry of correlation coefficient and method thereof 失效
    基于相关系数对称的相关装置及其方法

    公开(公告)号:US07664165B2

    公开(公告)日:2010-02-16

    申请号:US11284215

    申请日:2005-11-21

    IPC分类号: H04B1/00

    CPC分类号: G06F17/15 H04L27/2662

    摘要: Provided is a correlation apparatus based on symmetry of a correlation coefficient that can reduce complexity of hardware by reducing the number of adders and multipliers. Accordingly, when values of a real number part and an imaginary number part are exchanged with respect to a middle point of a correlation coefficient sequence and divided into two parts of left and right by the middle point of the correlation coefficient sequence, the values of the real number part and the imaginary number part are even-symmetrical with respect to the middle point of the divided two parts. Therefore, the number of the adders required for forming the correlation apparatus is reduced by at least 20% and the number of the multipliers is reduced by at least 70% in comparison with the 62 adders and the 64 multipliers required for a conventional correlation apparatus.

    摘要翻译: 提供了一种基于相关系数的对称性的相关装置,其可以通过减少加法器和乘法器的数量来降低硬件的复杂度。 因此,当实数部分和虚数部分的值相对于相关系数序列的中点被交换并且被相关系数序列的中点分成左和右的两部分时, 实数部分和虚数部分相对于分割的两部分的中点是均匀对称的。 因此,与常规相关装置所需的62个加法器和64个乘法器相比,形成相关装置所需的加法器的数量减少了至少20%,并且乘法器的数量减少了至少70%。

    Correlation apparatus based on symmetry of correlation coefficient and method thereof
    2.
    发明申请
    Correlation apparatus based on symmetry of correlation coefficient and method thereof 失效
    基于相关系数对称的相关装置及其方法

    公开(公告)号:US20060126766A1

    公开(公告)日:2006-06-15

    申请号:US11284215

    申请日:2005-11-21

    IPC分类号: H04L27/06

    CPC分类号: G06F17/15 H04L27/2662

    摘要: Provided is a correlation apparatus based on symmetry of a correlation coefficient that can reduce complexity of hardware by reducing the number of adders and multipliers, and a method thereof. The correlation apparatus for correlating a complex correlation coefficient sequence which is symmetrical with respect to a received complex signal sequence includes a delaying means for delaying the received complex signal sequence; a first adding means for adding the complex signal sequence delayed in the delaying means; a second adding means for adding each output signal of the first adding means; a correlation coefficient multiplying means for multiplying each output signal of the second adding means by a complex correlation coefficient of the complex correlation coefficient sequence; and a final output adding means for adding each output signal of the correlation coefficient multiplying means.

    摘要翻译: 提供了一种基于可以通过减少加法器和乘法器的数量来降低硬件的复杂度的相关系数的对称性的相关装置及其方法。 用于使相关于接收的复信号序列对称的复相关系数序列相关的相关装置包括用于延迟所接收的复信号序列的延迟装置; 第一加法装置,用于将延迟装置中延迟的复信号序列相加; 第二加法装置,用于添加第一加法装置的每个输出信号; 相关系数乘法装置,用于将第二加法装置的每个输出信号乘以复相关系数序列的复相关系数; 以及最终输出加法装置,用于相加相关系数乘法装置的每个输出信号。

    Apparatus and method for controlling a screen display in portable terminal
    3.
    发明授权
    Apparatus and method for controlling a screen display in portable terminal 有权
    用于控制便携式终端中的屏幕显示的装置和方法

    公开(公告)号:US09229631B2

    公开(公告)日:2016-01-05

    申请号:US13335687

    申请日:2011-12-22

    摘要: An apparatus and method for controlling a screen display in a portable terminal are provided. The apparatus includes a display unit, an input unit, a memory unit, a magnification identifying unit, and a controller. The display unit displays a screen display having a controlled magnification level. The input unit sets a zoom-in or zoom-out point on the screen display. The memory unit stores reference information for determining a zoom-in or zoom-out magnification level of the screen display. The magnification identifying unit measures a tilt of the portable terminal, and determines control or non-control of a magnification level of the screen display using the measured tilt. The controller controls the screen display according to the identified magnification level.

    摘要翻译: 提供一种用于控制便携式终端中的屏幕显示的装置和方法。 该装置包括显示单元,输入单元,存储单元,倍率识别单元和控制器。 显示单元显示具有受控放大级别的屏幕显示。 输入单元在屏幕显示上设置放大或缩小点。 存储单元存储用于确定屏幕显示的放大或缩小放大级别的参考信息。 放大率识别单元测量便携式终端的倾斜度,并且使用测量的倾斜来确定对屏幕显示的放大级别的控制或非控制。 控制器根据识别的放大级别控制屏幕显示。

    Method for reducing current consumption in a mobile communication terminal
    4.
    发明授权
    Method for reducing current consumption in a mobile communication terminal 失效
    降低移动通信终端电流消耗的方法

    公开(公告)号:US06973584B2

    公开(公告)日:2005-12-06

    申请号:US10207696

    申请日:2002-07-29

    IPC分类号: H04B1/40 G06F1/32

    摘要: A method for reducing current consumption of a mobile terminal is provided. The method includes setting a task as an initial idle task of the mobile terminal for performing a simple infinite loop in a state where all of the effective tasks performed by a program of the mobile terminal are blocked, counting global variable values of the idle task for a predetermined time according to a timer interrupt signal generated by the timer at regular intervals and storing the global variable values of the idle task as a reference value of an idle task of a program of the mobile terminal, resetting the counted value, measuring by counting the global variable values of the idle task where an effective task occupies the idle task for a predetermined time and storing the global variable values of the idle task as an idle value of the effective task according to a timer interrupt generated every predetermined time by the timer when the program of the mobile terminal performs the effective task, dividing the measured idle value of the effective task by the reference value of the idle task, to thus calculate a program idle rate of the mobile terminal, and storing the program idle rate, and changing a PLL value according to the program idle rate of the mobile terminal and varying a main clock frequency of a CPU of the mobile communication terminal.

    摘要翻译: 提供了一种用于减少移动终端的电流消耗的方法。 该方法包括将任务设置为移动终端的初始空闲任务,用于在由移动终端的程序执行的所有有效任务被阻止的状态下执行简单的无限循环,对空闲任务的全局变量值进行计数 根据由定时器以规则间隔产生的定时器中断信号的预定时间,并将空闲任务的全局变量值存储为移动终端的程序的空闲任务的参考值,重置计数值,通过计数 空闲任务的全局变量值,其中有效任务占用空闲任务达预定时间,并且根据每个预定时间由定时器产生的定时器中断将空闲任务的全局变量值存储为有效任务的空闲值 当移动终端的程序执行有效任务时,将有效任务的测量空闲值除以参考值 空闲任务,从而计算移动终端的节目空闲率,并存储节目空闲速率,并根据移动终端的节目空闲速率改变PLL值,并改变移动台的CPU的主时钟频率 通讯终端

    Method for providing a data service in a CDMA communications system
    5.
    发明授权
    Method for providing a data service in a CDMA communications system 有权
    一种在CDMA通信系统中提供数据业务的方法

    公开(公告)号:US06757271B1

    公开(公告)日:2004-06-29

    申请号:US09369505

    申请日:1999-08-06

    申请人: Jung-Sik Kim

    发明人: Jung-Sik Kim

    IPC分类号: H04B7216

    CPC分类号: H04W4/24 H04W48/12

    摘要: A method for providing a data service in a CDMA communications system includes sending, at a base station, information about a free data channel to a plurality of mobile stations on a common channel; and sending, at the base station, specified free data to the plurality of mobile stations on the free data channel. The method may also include demodulating, at a mobile station, a common channel received from a base station to detect information about a free data channel; and demodulating, at the mobile station, the free data channel received from the base station according to the information about the free data channel and receiving the corresponding free data.

    摘要翻译: 一种用于在CDMA通信系统中提供数据服务的方法包括:在基站处,在公共信道上向多个移动站发送关于空闲数据信道的信息; 以及在所述基站向所述空闲数据信道上的所述多个移动台发送指定的空闲数据。 该方法还可以包括在移动站处解调从基站接收的公共信道以检测关于空闲数据信道的信息; 以及在所述移动站处,根据关于所述空闲数据信道的信息并接收相应的空闲数据来解调从所述基站接收到的空闲数据信道。

    Base-band interleaver for code division multiple access mobile
telecommunication system
    6.
    发明授权
    Base-band interleaver for code division multiple access mobile telecommunication system 失效
    用于码分多址移动电信系统的基带交织器

    公开(公告)号:US6064664A

    公开(公告)日:2000-05-16

    申请号:US937304

    申请日:1997-09-22

    申请人: Jung-Sik Kim

    发明人: Jung-Sik Kim

    CPC分类号: H03M13/2764

    摘要: A base-band interleaver for forward traffic and paging channel for CDMA mobile telecommunication system with reduced memory size for data interleaving and more simplified construction. Modulo-16 circuit divides an index by a numeral 16, the index being a selected one of successive indexes 0 to 383 corresponding to input data, and provides a remainder. Bit invertor makes bit inversion of an output from the modulo-16 circuit and determines a column position to write in the data with interleaving taken. Quotient-16 circuit produces a quotient of dividing of the index by the numeral 16. Code converter has a row table by which the quotient is respectively matched to a row position to be written with interleaving taken, for generating a row position corresponding to the quotient. 24-based counter provides a 24-based counted value corresponding to a selected row of output data to read out. 16-based counter provides a 16-based counted value corresponding to a selected column of output data to read out. Memory has an interleaving table inclusive of 32 rows and 16 columns, the input data being written to a selected position of the interleaving table according to an output of the bit invertor and an output of the code converter, the output data being data read out from a position corresponding to the output of the 16-based counter and the output of the 24-based counter.

    摘要翻译: 用于CDMA移动电信系统的用于前向业务和寻呼信道的基带交织器,具有用于数据交织和更简化结构的具有减小的存储器大小的存储器大小。 模16电路将索引除以数字16,索引是对应于输入数据的连续索引0至383中的选定一个,并提供余数。 位反相器使得模16电路的输出进行位反转,并确定列位置以便以交错进行写入数据。 商-16电路产生了一个商标,该索引数由数字16分开。代码转换器具有一个行表,通过该行表将商与要被写入的行位置分别匹配,以产生对应于商的行位置 。 基于24的计数器提供对应于所选择的一行输出数据读出的基于24的计数值。 基于16的计数器提供对应于所选择的输出数据列读出的基于16的计数值。 存储器具有包括32行和16列的交织表,根据位逆变器的输出和代码转换器的输出将输入数据写入交织表的选定位置,输出数据是从 对应于基于16的计数器的输出和基于24的计数器的输出的位置。

    Multipath accessible semiconductor memory device with host interface between processors
    8.
    发明授权
    Multipath accessible semiconductor memory device with host interface between processors 有权
    多路径可访问的半导体存储器件,具有处理器之间的主机接口

    公开(公告)号:US07941612B2

    公开(公告)日:2011-05-10

    申请号:US11829859

    申请日:2007-07-27

    IPC分类号: G06F12/00

    摘要: A multipath accessible semiconductor memory device provides an interface function between processors. The memory device may include a memory cell array having a shared memory area operationally coupled to two or more ports that are independently accessible by two or more processors, an access path forming unit to form a data access path between one of the ports and the shared memory area in response to external signals applied by the processors, and an interface unit having a semaphore area and mailbox areas accessible in the shared memory area by the two or more processors to provide an interface function for communication between the two or more processors.

    摘要翻译: 多路可及半导体存储器件提供处理器之间的接口功能。 存储器设备可以包括具有可操作地耦合到两个或更多个端口的共享存储器区域的存储单元阵列,该两个或多个端口可由两个或多个处理器独立地访问;访问路径形成单元,用于在一个端口和共享之间形成数据访问路径 响应于由处理器施加的外部信号的存储区域以及具有信号量区域和由两个或多个处理器在共享存储器区域中可访问的邮箱区域的接口单元,以提供用于两个或多个处理器之间的通信的接口功能。