公开(公告)号：US5844425A

公开(公告)日：1998-12-01

申请号：US694712

申请日：1996-07-19

申请人： Hung T. Nguyen ,  Chit Ah Mak ,  Steve W. T. Liu

发明人： Hung T. Nguyen ,  Chit Ah Mak ,  Steve W. T. Liu

IPC分类号： H03K19/003 ,  H03K19/00

CPC分类号： H03K19/00315

摘要： An overvoltage tolerant CMOS tristate output buffer capable of withstanding tristate overvoltages without reverse currents or latch-up, the output buffer having a stabilized protection circuit for driving the N-well and gate of the P-channel driver transistor to the output pad voltage when the output pad voltage becomes excessive. The stabilized protection circuit includes a hysteresis circuit for controlling switch transistors which bias the N-well. The presence of the hysteresis circuit causes the protection circuit to have an input hysteresis characteristic, thus preventing excessive switching of the N-well biasing transistors when the output pad voltage varies near the output buffer power supply voltage during tristate.

摘要翻译： 具有过压耐受性的三态输出缓冲器，能够承受三次过电压而不产生反向电流或闭锁，输出缓冲器具有稳定的保护电路，用于将P沟道驱动晶体管的N阱和栅极驱动到输出焊盘电压 输出焊盘电压过大。 稳定保护电路包括用于控制偏置N阱的开关晶体管的滞后电路。 滞后电路的存在使得保护电路具有输入滞后特性，因此当三态输出缓冲器电源电压接近输出焊盘电压时，防止了N阱偏置晶体管的过度切换。

公开(公告)号：US07659780B2

公开(公告)日：2010-02-09

申请号：US11947085

申请日：2007-11-29

申请人： Chit Ah Mak ,  Chun Fai Wong ,  Lap Chi Leung ,  Xiaofei Kuang ,  Jennifer Shuet Yan Ho ,  David Kwok Kuen Kwong

发明人： Chit Ah Mak ,  Chun Fai Wong ,  Lap Chi Leung ,  Xiaofei Kuang ,  Jennifer Shuet Yan Ho ,  David Kwok Kuen Kwong

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F1/3211 ,  H03F1/486 ,  H03F1/56 ,  H03F3/45192 ,  H03F2200/36 ,  H03F2200/513 ,  H03F2203/45138 ,  H03F2203/45356 ,  H03G1/0023 ,  H03G7/004 ,  H03G7/06

摘要： A gain control circuit including a resistor with a first terminal and a second terminal; an operational amplifier with an inverting terminal thereof electrically coupled to said first terminal of said resistor; a non-inverting terminal thereof; and an output terminal thereof; an amplifier circuit for transforming the voltage change of said operational amplifier output into a substantially exponential current change; wherein the output of said amplifier circuit is electrically coupled to said inverting terminal of said operational amplifier. The above described gain control circuit is able to perform wide bandwidth input signal buffering with linearity under low voltage and low power conditions. The circuit also offers low output impedances without the need of additional buffers and hence minimizing circuit size and manufacturing costs.

摘要翻译： 一种增益控制电路，包括具有第一端子和第二端子的电阻器; 运算放大器，其反相端电耦合到所述电阻器的所述第一端子; 其非反相端子; 及其输出端子; 放大器电路，用于将所述运算放大器输出的电压变化变换成基本指数的电流变化; 其中所述放大器电路的输出电耦合到所述运算放大器的所述反相端。 上述增益控制电路能够在低电压和低功率条件下以线性度执行宽带宽输入信号缓冲。 该电路还提供低输出阻抗，而不需要额外的缓冲器，因此最小化电路尺寸和制造成本。