摘要:
A packet combining device for a communication system using hybrid automatic repeat request (HARQ) includes: a HARQ buffer; a combiner configured to combine data which is previously received and stored in the HARQ buffer with newly-received data; and a channel decoder configured to attempt channel decoding by using the combined received data provided from the combiner and provide one or more of log likelihood ratios (LLRs) computed for a systematic bit and a parity bit of the combined received data to the combiner such that the one or more LLRs are combined with the data used for channel decoding.
摘要:
A packet combining device for a communication system using hybrid automatic repeat request (HARQ) includes: a HARQ buffer; a combiner configured to combine data which is previously received and stored in the HARQ buffer with newly-received data; and a channel decoder configured to attempt channel decoding by using the combined received data provided from the combiner and provide one or more of log likelihood ratios (LLRs) computed for a systematic bit and a parity bit of the combined received data to the combiner such that the one or more LLRs are combined with the data used for channel decoding.
摘要:
An apparatus for generating a parity bit for turbo decoding, and a MAP (Maximum A Posteriori) apparatus are provided. The apparatus for generating a parity bit for turbo decoding includes: a index converter calculating forward and reverse state matrices with respect to a parity bit by maintaining or changing the relationship between the forward and reverse state matrices with respect to information bits and input symbols according to an encoder state; and a parity calculation unit calculating a parity bit by using the forward and reverse state matrices calculated by the parity state matric calculation unit.
摘要翻译:提供了一种用于生成用于turbo解码的奇偶校验位的装置,以及MAP(Maximum A Reareriori)装置。 用于生成用于turbo解码的奇偶校验位的装置包括:索引转换器,相对于奇偶校验位,通过根据信息比特和输入符号保持或改变正向和反向状态矩阵之间的关系来计算正向和反向状态矩阵 编码器状态; 以及奇偶校验计算单元,通过使用由奇偶校验状态矩阵计算单元计算的正向和反向状态矩阵来计算奇偶校验位。
摘要:
An apparatus for generating a parity bit for turbo decoding, and a MAP (Maximum A Posteriori) apparatus are provided. The apparatus for generating a parity bit for turbo decoding includes: a index converter calculating forward and reverse state matrices with respect to a parity bit by maintaining or changing the relationship between the forward and reverse state matrices with respect to information bits and input symbols according to an encoder state; and a parity calculation unit calculating a parity bit by using the forward and reverse state matrices calculated by the parity state matric calculation unit.
摘要翻译:提供了一种用于生成用于turbo解码的奇偶校验位的装置,以及MAP(Maximum A Reareriori)装置。 用于生成用于turbo解码的奇偶校验位的装置包括:索引转换器,相对于奇偶校验位,通过根据信息比特和输入符号保持或改变正向和反向状态矩阵之间的关系来计算正向和反向状态矩阵 编码器状态; 以及奇偶校验计算单元,通过使用由奇偶校验状态矩阵计算单元计算的正向和反向状态矩阵来计算奇偶校验位。
摘要:
The present invention relates to a turbo decoder having a state metric, a calculating method using the turbo decoder and a computer-readable recoding medium for executing a calculation method implemented to the turbo decoder. The turbo decoder includes branch metric calculation unit, state metric calculation unit and log likelihood ratio calculation unit. The present invention may reduce calculation steps by simplifying a conventional turbo decode algorithm, reducing a size of a hardware, which the turbo decoder can be implemented in as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA). The present invention can be implemented in an error correction in wireless communication system and satellite communication system.
摘要:
There are provided a distributed video coding apparatus and method capable of controlling an encoding rate, the apparatus including: an intra-frame encoder encoding a key frame and outputting a bit stream of the encoded key frame; an encoder rate control (ERC) module calculating a bit rate according to motion complexity of a present Wyner-Ziv (WZ) frame by using a correlation between the motion complexity and the bit rate; and a turbo encoder encoding the present WZ frame by the bit rate calculated at the ERC module and outputting the encoded WZ bit stream.
摘要:
Provided are a multiplierless FIR digital filter and a method of designing the same, in which a filtering operation is performed by a small addition/subtraction circuit using extracted information after analyzing the property of a given coefficient and extracting information required for design by only adding/subtracting operations. In the method of designing the multiplierless FIR digital filter, tables are created to extract and store information needed for adding and subtracting operations. An addition table is created to store values obtained by adding the input data synchronized with a clock frequency. Further, a value corresponding to multiplication is obtained by performing extraction and error correction on the added values from the tables, and an adder chain of an output terminal sums up the values and outputs the filtering results, thereby effectively implementing a logic circuit of the multipliedess FIR digital filter.
摘要:
An anisotropic diffusion method and apparatus based on the direction of an edge are disclosed. In the anisotropic diffusion apparatus, directional pattern masking is performed to determine the direction of an edge in an image including noise, and values obtained through the directional pattern masking are convoluted to calculate the magnitude of an image. If the calculated magnitude value of the edge is larger than a threshold value, the edge of the image is preserved, while if the calculated magnitude value of the edge is not larger than the threshold value, noise cancellation is strengthened, whereby noise can be effectively canceled (or concealed) while preserving the edge representing the characteristics of the image, and thus, an image of high quality can be obtained.
摘要:
There are provided a distributed video coding apparatus and method capable of controlling an encoding rate, the apparatus including: an intra-frame encoder encoding a key frame and outputting a bit stream of the encoded key frame; an encoder rate control (ERC) module calculating a bit rate according to motion complexity of a present Wyner-Ziv (WZ) frame by using a correlation between the motion complexity and the bit rate; and a turbo encoder encoding the present WZ frame by the bit rate calculated at the ERC module and outputting the encoded WZ bit stream.