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    Method of controlling erase operation of a memory and memory system implementing the same
    1.
    发明授权
    Method of controlling erase operation of a memory and memory system implementing the same 有权
    控制实现其的存储器和存储器系统的擦除操作的方法

    公开(公告)号：US09443599B2

    公开(公告)日：2016-09-13

    申请号：US14679046

    申请日：2015-04-06

    申请人： Hyun-Ju Yi ,  Seok-Won Ahn ,  Hwa-Seok Oh

    发明人： Hyun-Ju Yi ,  Seok-Won Ahn ,  Hwa-Seok Oh

    IPC分类号： G11C16/04 ,  G11C16/16 ,  G06F13/16 ,  G11C16/32

    CPC分类号： G11C16/16 ,  G06F13/161 ,  G11C16/32 ,  G11C2216/20

    摘要： A non-volatile memory and a method of controlling an erase operation of the non-volatile memory using a controller are provided. The method of controlling the erase operation includes beginning performance of the erase operation, monitoring a next command to be performed in the non-volatile memory while performing the erase operation, determining an erase status, and continuing, suspending or canceling the erase operation based on the determination result of the erase status.

    摘要翻译： 提供一种使用控制器来控制非易失性存储器的擦除操作的非易失性存储器和方法。 控制擦除操作的方法包括开始执行擦除操作，监视在执行擦除操作期间在非易失性存储器中执行的下一个命令，确定擦除状态，以及继续，暂停或取消擦除操作，基于 擦除状态的确定结果。

    Error correction code block having dual-syndrome generator, method thereof, and system having same
    2.
    发明授权
    Error correction code block having dual-syndrome generator, method thereof, and system having same 有权
    纠错码块，具有双重认证发生器，其方法和具有该纠错码的系统

    公开(公告)号：US09246515B2

    公开(公告)日：2016-01-26

    申请号：US13340818

    申请日：2011-12-30

    申请人： Jae Phil Kong ,  Seok-Won Ahn

    发明人： Jae Phil Kong ,  Seok-Won Ahn

    IPC分类号： H03M13/00 ,  H03M13/15 ,  G06F11/10

    CPC分类号： H03M13/1515 ,  G06F11/10 ,  H03M13/152 ,  H03M13/1545 ,  H03M13/159 ,  H03M13/6561

    摘要： An error correction code block including dual-syndrome generators, which may process a plurality of successive code word without latency, is configured to calculate syndrome values of a corresponding even numbered codeword among the plurality of code words by using one of the dual-syndrome generators, and is configured to calculate syndrome values of a corresponding odd numbered codeword among the plurality of code words by using the other of the dual-syndrome generators.

    摘要翻译： 包括可以处理多个连续码字而不具有等待时间的双奇偶校验发生器的纠错码块被配置为通过使用双综合征发生器之一来计算多个码字中的相应偶数码字的校正子值 并且被配置为通过使用所述双奇偶校验发生器中的另一个来计算所述多个码字中的相应奇数码字的校正子值。

    ERROR CORRECTION CODE BLOCK HAVING DUAL-SYNDROME GENERATOR, METHOD THEREOF, AND SYSTEM HAVING SAME
    4.
    发明申请
    ERROR CORRECTION CODE BLOCK HAVING DUAL-SYNDROME GENERATOR, METHOD THEREOF, AND SYSTEM HAVING SAME 有权
    具有双综合症发生器的错误校正代码块，其方法和具有相同系统的系统

    公开(公告)号：US20120173951A1

    公开(公告)日：2012-07-05

    申请号：US13340818

    申请日：2011-12-30

    申请人： Jae Phil Kong ,  Seok-Won Ahn

    发明人： Jae Phil Kong ,  Seok-Won Ahn

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： H03M13/1515 ,  G06F11/10 ,  H03M13/152 ,  H03M13/1545 ,  H03M13/159 ,  H03M13/6561

    摘要： An error correction code block including dual-syndrome generators, which may process a plurality of successive code word without latency, is configured to calculate syndrome values of a corresponding even numbered codeword among the plurality of code words by using one of the dual-syndrome generators, and is configured to calculate syndrome values of a corresponding odd numbered codeword among the plurality of code words by using the other of the dual-syndrome generators.

    摘要翻译： 包括可以处理多个连续码字而不具有等待时间的双奇偶校验发生器的纠错码块被配置为通过使用双综合征发生器之一来计算多个码字中的相应偶数码字的校正子值 并且被配置为通过使用所述双奇偶校验发生器中的另一个来计算所述多个码字中的相应奇数码字的校正子值。