Normalizing apparatus for adaptive beamforming in smart antenna receiving system
    1.
    发明授权
    Normalizing apparatus for adaptive beamforming in smart antenna receiving system 失效
    智能天线接收系统中自适应波束成形的归一化装置

    公开(公告)号:US06861981B2

    公开(公告)日:2005-03-01

    申请号:US10703002

    申请日:2003-11-05

    CPC分类号: H04B7/0854 H04B7/086

    摘要: Provided is a normalizing apparatus for adaptive beamforming by performing a normalizing process which uses a normalized least mean square (NLMS) algorithm that produces a weight vector for adaptive beamforming, in a smart antenna receiver. For the normalizing process, the normalizing apparatus includes a multiplication operation means that performs a multiplication operation, and a division operation means that performs a division operation using mathematic calculations based on binary logarithm principles, and using addition and subtraction operations.

    摘要翻译: 提供了一种用于自适应波束成形的归一化装置,其通过在智能天线接收机中执行使用产生用于自适应波束成形的加权矢量的归一化最小均方(NLMS)算法的归一化处理。 归一化处理的标准化装置包括进行乘法运算的乘法运算单元,以及使用基于二进制对数原理的数学运算进行除法运算的分割运算单元,使用加法运算和减法运算。

    Wireless modem, modulator, and demodulator
    2.
    发明申请
    Wireless modem, modulator, and demodulator 审中-公开
    无线调制解调器,调制器和解调器

    公开(公告)号:US20070237246A1

    公开(公告)日:2007-10-11

    申请号:US11496897

    申请日:2006-08-01

    IPC分类号: H04K1/10

    摘要: A wireless modem is mounted to a terminal for wireless communication, and specifically controls an internal drive clock to reduce power consumption in an active mode. The wireless modem includes: a wireless core module for transmitting and receiving a radio signal; a modulator for converting data to be transmitted into a wireless transmission signal and transmitting the converted signal to the wireless core module; a demodulator for converting the signal received from the wireless core module into reception data; a synchronizer for synchronizing the signal received from the wireless core module; and a clock controller for generating a drive clock of each of the modulator, the demodulator, and the synchronizer. A low power clock controller is divided into six main functional blocks of a synchronizer, an analog controller, a modulator, a channel decoder, a demodulator, and a channel encoder, and has a feature that a clock is input only when a main functional block operates. As a result, it is possible to minimize power consumption caused by clock switching when an Orthogonal Frequency Division Multiplexing Access (OFDMA) mobile station modem operates in an active mode through the clock controller.

    摘要翻译: 无线调制解调器被安装到用于无线通信的终端,并且具体地控制内部驱动时钟以降低活动模式中的功耗。 无线调制解调器包括:用于发送和接收无线电信号的无线核心模块; 用于将要发送的数据转换成无线发送信号并将转换的信号发送到无线核心模块的调制器; 解调器,用于将从无线核心模块接收的信号转换为接收数据; 用于使从所述无线核心模块接收的信号同步的同步器; 以及时钟控制器,用于产生调制器,解调器和同步器中的每一个的驱动时钟。 低功率时钟控制器被分为同步器,模拟控制器,调制器,信道解码器,解调器和信道编码器的六个主要功能块,并且具有仅当主功能块 操作。 结果,当正交频分复用接入(OFDMA)移动台调制解调器通过时钟控制器以活动模式操作时,可以最小化由时钟切换引起的功率消耗。

    Method for reducing decoder complexity in waveform interpolation speech decoding by converting dimension of vector
    3.
    发明授权
    Method for reducing decoder complexity in waveform interpolation speech decoding by converting dimension of vector 有权
    通过转换矢量维度来降低波形插值语音解码中解码器复杂度的方法

    公开(公告)号:US07848923B2

    公开(公告)日:2010-12-07

    申请号:US11409583

    申请日:2006-04-24

    IPC分类号: G10L19/12

    CPC分类号: G10L19/097 G10L25/90

    摘要: Provided is a method for converting a dimension of a vector. The vector dimension conversion method for vector quantization includes the steps of: extracting a specific parameter having a pitch period from an input speech signal and then generating a vector of a dimension that varies according to the pitch period; dividing an entire frequency domain of the generated vector of the variable dimension into at least two frequency domains; and converting the vector of the variable dimension into vectors of mutually different fixed dimensions according to the divided frequency domains. Thereby, not only an error due to the vector dimension conversion is suppressed but codebook memory required for the vector quantization is effectively reduced.

    摘要翻译: 提供了用于转换向量的维度的方法。 用于矢量量化的矢量维度转换方法包括以下步骤:从输入语音信号中提取具有音调周期的特定参数,然后生成根据音调周期而变化的维度向量; 将所生成的可变维度矢量的整个频域划分成至少两个频域; 并根据划分的频域将可变维度的向量转换成相互不同的固定维度向量。 因此,不仅由于矢量维度转换而导致的误差被抑制,而且矢量量化所需的码本存储器被有效地减少。

    Multi-metal coplanar waveguide
    4.
    发明授权
    Multi-metal coplanar waveguide 有权
    多金属共面波导

    公开(公告)号:US07626476B2

    公开(公告)日:2009-12-01

    申请号:US11690219

    申请日:2007-03-23

    IPC分类号: H01P3/08

    CPC分类号: H01P3/003

    摘要: A coplanar waveguide CPW using multi-layer interconnection CMOS technology is provided. In the CPW including an interlayer insulator disposed on a substrate, metal multilayers disposed on the interlayer insulator, and a ground line-a signal line-a ground line formed of an uppermost metal layer, when a ground line of a lowermost layer is connected to the ground line of the uppermost layer, intermediate metal layers are designed to gradually increase or decrease in width, or to be uneven so as to maximize an area where an ultra-high frequency spreads, thereby minimizing CPW loss and maximizing a slow wave effect. As a result, it is possible to improve performance of an ultra-high frequency circuit and miniaturize the circuit.

    摘要翻译: 提供了一种使用多层互连CMOS技术的共面波导CPW。 在包括设置在基板上的层间绝缘体的CPW中,设置在层间绝缘体上的金属多层和最下层的接地线的接地线 - 信号线 - 由最上层金属层形成的接地线连接到 最上层的地线,中间金属层被设计成逐渐增加或减小宽度或不均匀,以便使超高频率扩展的面积最大化,由此最小化CPW损耗并最大化慢波效应。 结果,可以提高超高频电路的性能并使电路小型化。

    Region searcher and method of driving the same and code searcher using the same
    5.
    发明授权
    Region searcher and method of driving the same and code searcher using the same 失效
    区域搜索器及其驱动方法及使用其的代码搜索器

    公开(公告)号:US07197065B2

    公开(公告)日:2007-03-27

    申请号:US10238685

    申请日:2002-09-09

    IPC分类号: H04B1/69

    CPC分类号: H04B1/7077 H04B1/70755

    摘要: A region searcher, a method of driving the same, and a code searcher using the same are disclosed. When a predetermined region is iteratively searched, the energy value corresponding to the same hypothesis location value is stored by using a searcher having divided two buffers, thereby the implementation complexity thereof can be remarkably reduced, without using a simple memory.In addition, in case where the region is iteratively searched in the state of the deteriorated signal-to-noise ratio to find the energy value at one hypothesis location and in case where the region must be iteratively searched because of the restriction which the size of the matched filter can be not increased, the implementation complexity thereof can be remarkably reduced.

    摘要翻译: 公开了一种区域搜索器,其驱动方法和使用该搜索器的代码搜索器。 当迭代地搜索预定区域时,通过使用具有划分的两个缓冲器的搜索器来存储对应于相同假设位置值的能量值,从而可以显着地减少其实施复杂度,而不使用简单的存储器。

    Inverse modified discrete cosine transform (IMDCT) co-processor and audio decoder having the same
    6.
    发明申请
    Inverse modified discrete cosine transform (IMDCT) co-processor and audio decoder having the same 失效
    协处理器和音频解码器的逆修正离散余弦变换(IMDCT)具有相同的功能

    公开(公告)号:US20070050440A1

    公开(公告)日:2007-03-01

    申请号:US11432100

    申请日:2006-05-11

    IPC分类号: G06F17/14

    CPC分类号: G06F17/147 G10L19/16

    摘要: Provided are an IMDCT co-processor and an audio decoder having the same. The IMDCT co-processor includes: an input buffer for storing an input inverse-quantized frequency spectrum sample value; an I/Q separator for dividing the sample value stored in the input buffer into real data I and imaginary data Q; a first operation unit for performing complex-multiplication on the data divided by the I/Q separator and a given twiddle factor; an IFFT unit for performing an inverse fast Fourier transform on the operation result value of the first operation unit; a second operation unit for performing complex-multiplication on the result value from the IFFT unit and a given twiddle factor; a deinterleaver for receiving the operation result value from the second operation unit to arrange data and performing inverse-mapping on a positive value (+) and a negative value (−) of a certain portion of the data to each other to output a final IMDCT time sample value; and a control register for selecting the input inverse-quantized frequency spectrum sample value according to a given window sequence value to determine the final IMDCT time sample value.

    摘要翻译: 提供了一种IMDCT协处理器和具有其的音频解码器。 IMDCT协处理器包括:输入缓冲器,用于存储输入的反量化频谱样本值; I / Q分离器,用于将存储在输入缓冲器中的采样值分成实数数据I和虚数据Q; 第一操作单元,用于对由I / Q分离器划分的数据和给定的旋转因子进行复数乘法; IFFT单元,用于对第一操作单元的操作结果值进行快速傅立叶逆变换; 第二操作单元,用于对来自IFFT单元的结果值和给定的旋转因子进行复数乘法; 去交织器,用于从第二操作单元接收操作结果值以排列数据并且对数据的某一部分的正值(+)和负值( - )进行反向映射,以输出最终的IMDCT 时间样本值; 以及控制寄存器,用于根据给定的窗口序列值选择输入的反量化频谱采样值,以确定最终的IMDCT时间采样值。

    Methods for coding and decoding nibble inversion codes and block inversion codes and coding and decoding apparatus for the same
    7.
    发明授权
    Methods for coding and decoding nibble inversion codes and block inversion codes and coding and decoding apparatus for the same 失效
    用于编码和解码半字节反转码和块反转码的方法及其编码和解码装置

    公开(公告)号:US06366223B1

    公开(公告)日:2002-04-02

    申请号:US09350097

    申请日:1999-07-09

    IPC分类号: H03M700

    CPC分类号: H03M5/04

    摘要: A nibble inversion and block inversion code coding and decoding method and a coding and decoding apparatus for the same. The apparatus includes a disparity calculator for receiving a pre-code in which a nibble-inverted indication (NII) bit is added at the position next to the LSB of a source data of a n-bit (n represents an odd number higher than 3), computing a disparity Dpc value of the pre-code, computing a disparity value Dni of the odd bit nibble-inverted pre-code, decoding a code type in accordance with the value of the register and the value of the running digital sum RDS which represent the disparity code and outputting a control signal for manipulating the bits of the pre-code; a RDS calculator for outputting a RDS value which is obtained by accumulatively summing the disparity of the calculated code word by the unit of blocks for selecting a code word or a complement code word when the computed disparity Dpc is not 0; and a bit manipulator for selecting a nibble-inverted and block-inverted (NIBI) code type in accordance with a control signal from the disparity calculator, manipulating a bit of the inputted pre-code and generating a code word or a complement code word, for thereby providing a transition and a DC spectrum component of 0, using a 1-bit redundancy bit when a predetermined n-bit (n represents odd number) is coded, providing multiple frame patterns, and fully providing an in-band and out-band signal.

    摘要翻译: 一种半字节反转和块反转码编码和解码方法及其编码和解码装置。 该装置包括:视差计算器,用于接收在n比特的源数据的LSB旁边的位置附加了半字节反转指示(NII)比特的预编码(n表示高于3的奇数) ),计算预编码的视差Dpc值,计算奇数比特半字节反相前置码的视差值Dni,根据寄存器的值解码码类型和运行数字和RDS的值 其代表差异码并输出用于操纵前置码的位的控制信号; RDS计算器,用于输出当所计算的视差Dpc不为0时通过用于选择代码字或补码的单元的单元累积求和所计算的代码字的视差获得的RDS值; 以及用于根据来自视差计算器的控制信号选择半字节反转和块反转(NIBI)码类型的位操纵器,操纵输入的预编码的位并产生码字或补码字, 从而提供转换和DC频谱分量为0,当预定的n位(n表示奇数)被编码时,使用1位冗余位,提供多个帧模式,并且完全提供带内和外部 频带信号。

    UPLINK RECEIVING APPARATUS OF OFDMA SYSTEM BASED ON LTE AND FREQUENCY SYNCHRONIZATION METHOD THEREOF
    8.
    发明申请
    UPLINK RECEIVING APPARATUS OF OFDMA SYSTEM BASED ON LTE AND FREQUENCY SYNCHRONIZATION METHOD THEREOF 审中-公开
    基于LTE的OFDMA系统的UPLINK接收设备及其频率同步方法

    公开(公告)号:US20110292927A1

    公开(公告)日:2011-12-01

    申请号:US13116450

    申请日:2011-05-26

    IPC分类号: H04W88/02 H04W56/00

    摘要: Provided are an uplink receiving device of a long term evolution (LTE)-based orthogonal frequency division multiplexing access (OFDMA) system, and a method of synchronizing a frequency thereof. The uplink receiving device includes a fast Fourier transform (FFT) processing unit eliminating a cyclic prefix (CP) from an OFDM uplink signal to perform a fast Fourier transform (FFT); a subcarrier extraction unit performing a subcarrier extraction operation with regard to an output of the FFT processing unit to thus only extract a signal of a specific terminal unit; and an inverse discrete Fourier transform (DFT) processing unit performing an inverse DFT on an output of the subcarrier extraction unit to generate a time domain signal.

    摘要翻译: 提供了一种基于长期演进(LTE)的正交频分复用接入(OFDMA)系统的上行链路接收装置及其频率同步的方法。 上行链路接收装置包括从OFDM上行链路信号中消除循环前缀(CP)的快速傅里叶变换(FFT)处理单元,以执行快速傅里叶变换(FFT); 子载波提取单元,对FFT处理单元的输出执行子载波提取操作,从而仅提取特定终端单元的信号; 以及对所述子载波提取单元的输出执行逆DFT以产生时域信号的逆离散傅里叶变换(DFT)处理单元。

    Blind channel estimation in an orthogonal frequency division multiplexing system
    9.
    发明授权
    Blind channel estimation in an orthogonal frequency division multiplexing system 有权
    正交频分复用系统盲信道估计

    公开(公告)号:US07929620B2

    公开(公告)日:2011-04-19

    申请号:US11634276

    申请日:2006-12-05

    IPC分类号: H04L27/28 H04J11/00

    摘要: A method for stable channel estimation to increase frequency band efficiency that is lost by using a pilot, and to reduce the complexity and the sensitivity to channel zero. The method includes generating an i-th symbol block Si including N carriers, performing an inverse fast Fourier transform (IFFT) operation on the i-th symbol block, and forming an orthogonal frequency division multiplexing (OFDM) symbol block. The method also includes attaching a guard interval sample in front of the i-th OFDM symbol block Ui and forming at least one OFDM symbol block Ui,cp. The method further includes modeling the formed OFDM symbol block Ui,cp with a channel finite impulse response (FIR) filter and estimating channel impulse response using signals yi received through a channel.

    摘要翻译: 一种用于稳定信道估计的方法,以增加使用导频丢失的频带效率,并降低对信道零的复杂度和灵敏度。 该方法包括生成包括N个载波的第i个符号块Si,对第i个符号块执行快速傅里叶逆变换(IFFT),并形成正交频分复用(OFDM)符号块。 该方法还包括在第i个OFDM符号块Ui的前面附加保护间隔样本并形成至少一个OFDM符号块U 1,c p。 该方法还包括使用信道有限脉冲响应(FIR)滤波器对形成的OFDM符号块Ui,cp进行建模,并且使用通过信道接收的信号y i来估计信道脉冲响应。

    Inverse modified discrete cosine transform (IMDCT) co-processor and audio decoder having the same
    10.
    发明授权
    Inverse modified discrete cosine transform (IMDCT) co-processor and audio decoder having the same 失效
    协处理器和音频解码器的逆修正离散余弦变换(IMDCT)具有相同的功能

    公开(公告)号:US07627623B2

    公开(公告)日:2009-12-01

    申请号:US11432100

    申请日:2006-05-11

    IPC分类号: G06F17/14

    CPC分类号: G06F17/147 G10L19/16

    摘要: Provided are an IMDCT co-processor and an audio decoder having the same. The IMDCT co-processor includes: an input buffer for storing an input inverse-quantized frequency spectrum sample value; an I/Q separator for dividing the sample value stored in the input buffer into real data I and imaginary data Q; a first operation unit for performing complex-multiplication on the data divided by the I/Q separator and a given twiddle factor; an IFFT unit for performing an inverse fast Fourier transform on the operation result value of the first operation unit; a second operation unit for performing complex-multiplication on the result value from the IFFT unit and a given twiddle factor; a deinterleaver for receiving the operation result value from the second operation unit to arrange data and performing inverse-mapping on a positive value (+) and a negative value (−) of a certain portion of the data to each other to output a final IMDCT time sample value; and a control register for selecting the input inverse-quantized frequency spectrum sample value according to a given window sequence value to determine the final IMDCT time sample value.

    摘要翻译: 提供了一种IMDCT协处理器和具有其的音频解码器。 IMDCT协处理器包括:输入缓冲器,用于存储输入的反量化频谱样本值; I / Q分离器,用于将存储在输入缓冲器中的采样值分成实数数据I和虚数据Q; 第一操作单元,用于对由I / Q分离器划分的数据和给定的旋转因子进行复数乘法; IFFT单元,用于对第一操作单元的操作结果值进行快速傅立叶逆变换; 第二操作单元,用于对来自IFFT单元的结果值和给定的旋转因子进行复数乘法; 去交织器,用于从第二操作单元接收操作结果值以排列数据并且对数据的某一部分的正值(+)和负值( - )进行反向映射,以输出最终的IMDCT 时间样本值; 以及控制寄存器,用于根据给定的窗口序列值选择输入的反量化频谱采样值,以确定最终的IMDCT时间采样值。