摘要:
Provided is a normalizing apparatus for adaptive beamforming by performing a normalizing process which uses a normalized least mean square (NLMS) algorithm that produces a weight vector for adaptive beamforming, in a smart antenna receiver. For the normalizing process, the normalizing apparatus includes a multiplication operation means that performs a multiplication operation, and a division operation means that performs a division operation using mathematic calculations based on binary logarithm principles, and using addition and subtraction operations.
摘要:
A wireless modem is mounted to a terminal for wireless communication, and specifically controls an internal drive clock to reduce power consumption in an active mode. The wireless modem includes: a wireless core module for transmitting and receiving a radio signal; a modulator for converting data to be transmitted into a wireless transmission signal and transmitting the converted signal to the wireless core module; a demodulator for converting the signal received from the wireless core module into reception data; a synchronizer for synchronizing the signal received from the wireless core module; and a clock controller for generating a drive clock of each of the modulator, the demodulator, and the synchronizer. A low power clock controller is divided into six main functional blocks of a synchronizer, an analog controller, a modulator, a channel decoder, a demodulator, and a channel encoder, and has a feature that a clock is input only when a main functional block operates. As a result, it is possible to minimize power consumption caused by clock switching when an Orthogonal Frequency Division Multiplexing Access (OFDMA) mobile station modem operates in an active mode through the clock controller.
摘要:
Provided is a method for converting a dimension of a vector. The vector dimension conversion method for vector quantization includes the steps of: extracting a specific parameter having a pitch period from an input speech signal and then generating a vector of a dimension that varies according to the pitch period; dividing an entire frequency domain of the generated vector of the variable dimension into at least two frequency domains; and converting the vector of the variable dimension into vectors of mutually different fixed dimensions according to the divided frequency domains. Thereby, not only an error due to the vector dimension conversion is suppressed but codebook memory required for the vector quantization is effectively reduced.
摘要:
A coplanar waveguide CPW using multi-layer interconnection CMOS technology is provided. In the CPW including an interlayer insulator disposed on a substrate, metal multilayers disposed on the interlayer insulator, and a ground line-a signal line-a ground line formed of an uppermost metal layer, when a ground line of a lowermost layer is connected to the ground line of the uppermost layer, intermediate metal layers are designed to gradually increase or decrease in width, or to be uneven so as to maximize an area where an ultra-high frequency spreads, thereby minimizing CPW loss and maximizing a slow wave effect. As a result, it is possible to improve performance of an ultra-high frequency circuit and miniaturize the circuit.
摘要:
A region searcher, a method of driving the same, and a code searcher using the same are disclosed. When a predetermined region is iteratively searched, the energy value corresponding to the same hypothesis location value is stored by using a searcher having divided two buffers, thereby the implementation complexity thereof can be remarkably reduced, without using a simple memory.In addition, in case where the region is iteratively searched in the state of the deteriorated signal-to-noise ratio to find the energy value at one hypothesis location and in case where the region must be iteratively searched because of the restriction which the size of the matched filter can be not increased, the implementation complexity thereof can be remarkably reduced.
摘要:
Provided are an IMDCT co-processor and an audio decoder having the same. The IMDCT co-processor includes: an input buffer for storing an input inverse-quantized frequency spectrum sample value; an I/Q separator for dividing the sample value stored in the input buffer into real data I and imaginary data Q; a first operation unit for performing complex-multiplication on the data divided by the I/Q separator and a given twiddle factor; an IFFT unit for performing an inverse fast Fourier transform on the operation result value of the first operation unit; a second operation unit for performing complex-multiplication on the result value from the IFFT unit and a given twiddle factor; a deinterleaver for receiving the operation result value from the second operation unit to arrange data and performing inverse-mapping on a positive value (+) and a negative value (−) of a certain portion of the data to each other to output a final IMDCT time sample value; and a control register for selecting the input inverse-quantized frequency spectrum sample value according to a given window sequence value to determine the final IMDCT time sample value.
摘要:
A nibble inversion and block inversion code coding and decoding method and a coding and decoding apparatus for the same. The apparatus includes a disparity calculator for receiving a pre-code in which a nibble-inverted indication (NII) bit is added at the position next to the LSB of a source data of a n-bit (n represents an odd number higher than 3), computing a disparity Dpc value of the pre-code, computing a disparity value Dni of the odd bit nibble-inverted pre-code, decoding a code type in accordance with the value of the register and the value of the running digital sum RDS which represent the disparity code and outputting a control signal for manipulating the bits of the pre-code; a RDS calculator for outputting a RDS value which is obtained by accumulatively summing the disparity of the calculated code word by the unit of blocks for selecting a code word or a complement code word when the computed disparity Dpc is not 0; and a bit manipulator for selecting a nibble-inverted and block-inverted (NIBI) code type in accordance with a control signal from the disparity calculator, manipulating a bit of the inputted pre-code and generating a code word or a complement code word, for thereby providing a transition and a DC spectrum component of 0, using a 1-bit redundancy bit when a predetermined n-bit (n represents odd number) is coded, providing multiple frame patterns, and fully providing an in-band and out-band signal.
摘要:
Provided are an uplink receiving device of a long term evolution (LTE)-based orthogonal frequency division multiplexing access (OFDMA) system, and a method of synchronizing a frequency thereof. The uplink receiving device includes a fast Fourier transform (FFT) processing unit eliminating a cyclic prefix (CP) from an OFDM uplink signal to perform a fast Fourier transform (FFT); a subcarrier extraction unit performing a subcarrier extraction operation with regard to an output of the FFT processing unit to thus only extract a signal of a specific terminal unit; and an inverse discrete Fourier transform (DFT) processing unit performing an inverse DFT on an output of the subcarrier extraction unit to generate a time domain signal.
摘要:
A method for stable channel estimation to increase frequency band efficiency that is lost by using a pilot, and to reduce the complexity and the sensitivity to channel zero. The method includes generating an i-th symbol block Si including N carriers, performing an inverse fast Fourier transform (IFFT) operation on the i-th symbol block, and forming an orthogonal frequency division multiplexing (OFDM) symbol block. The method also includes attaching a guard interval sample in front of the i-th OFDM symbol block Ui and forming at least one OFDM symbol block Ui,cp. The method further includes modeling the formed OFDM symbol block Ui,cp with a channel finite impulse response (FIR) filter and estimating channel impulse response using signals yi received through a channel.
摘要:
Provided are an IMDCT co-processor and an audio decoder having the same. The IMDCT co-processor includes: an input buffer for storing an input inverse-quantized frequency spectrum sample value; an I/Q separator for dividing the sample value stored in the input buffer into real data I and imaginary data Q; a first operation unit for performing complex-multiplication on the data divided by the I/Q separator and a given twiddle factor; an IFFT unit for performing an inverse fast Fourier transform on the operation result value of the first operation unit; a second operation unit for performing complex-multiplication on the result value from the IFFT unit and a given twiddle factor; a deinterleaver for receiving the operation result value from the second operation unit to arrange data and performing inverse-mapping on a positive value (+) and a negative value (−) of a certain portion of the data to each other to output a final IMDCT time sample value; and a control register for selecting the input inverse-quantized frequency spectrum sample value according to a given window sequence value to determine the final IMDCT time sample value.