公开(公告)号：US3616403A

公开(公告)日：1971-10-26

申请号：US3616403D

申请日：1968-10-25

Applicant: IBM

Inventor： COLLINS ROBERT H ,  LOGAN JOSEPH S

IPC: C23C14/10 ,  H01J37/34 ,  H01L23/29 ,  C23C15/00

CPC classification number: H01J37/34 ,  C23C14/10 ,  H01L23/291 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Method for preventing inversion of semiconductor surfaces during RF sputtering of dielectrics by maintaining a low flat band charge level at the semiconductor interface. The flat band charge level is controlled by rigidly maintaining various parameters of the sputtering system such as target purity, and RF power density, in conjunction with the presence of a thin layer of phosphosilicate glass on the semiconductor which is supported on a dielectric material in floating mode.

公开(公告)号：US3480841A

公开(公告)日：1969-11-25

申请号：US3480841D

申请日：1967-01-13

Applicant: IBM

Inventor： CASTRUCCI PAUL P ,  COLLINS ROBERT H ,  SHEPHEARD ROBERT G

IPC: H01L21/00 ,  H01L21/60 ,  H01L23/485 ,  H01L3/00 ,  H01L5/00

CPC classification number: H01L23/485 ,  H01L21/00 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/37147 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/00

Abstract: 1,193,532. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 8 Jan., 1968 [13 Jan., 1967], No. 1001/68. Heading H1K. [Also in Division C7] Electrical contact is made to a semi-conductor region with an impurity concentration of at least 1018 atoms cm. -3 by depositing first a film of chromium, aluminium or titanium and then a film of nickel, silver, copper or copper chromium alloy. In one embodiment an antimony-doped N+type silicon wafer carrying an epitaxial N type layer is first provided with a silicon oxide coating by heating in dry oxygen and then in steam, or by R.F. sputtering, or with a layer of silicon nitride or alumina. Base and emitter regions are then formed by successive diffusions of boron and phosphorus into the N layer using standard planar techniques, the second diffusion doping the emitter and collector contact region with 5 Î 10 20 atoms/c.c. of phosphorus. Aluminium base and emitter contacts are next provided by vapour deposition overall followed by form-etching and sintering. Glass is subsequently deposited over the contacted face of the wafer in two stages of R.F. sputtering each followed by a firing stage. The wafer is then inverted in an evacuated vapour deposition chamber and its back collector contact face coated with successive layers of chromium, copper and gold of specified thickness while the wafer is held at 200-250‹ C. Holes are next etched through the glass layer to expose the aluminium contacts upon which similar layers of Cr, Cu and Au are then deposited through masks followed by layers of lead-tin solder by means of which nickel-plated copper balls are attached to the contacts. Finally the completed elements are attached to silver palladium lands on an alumina mounting plate and the ball contacts connected via nickel-plated copper strips to adjacent lands using lead-tin solder. In alternative planar diode and transistor embodiments the outer layer of gold is omitted.

公开(公告)号：US3615937A

公开(公告)日：1971-10-26

申请号：US3615937D

申请日：1968-06-17

Applicant: IBM

Inventor： COLLINS ROBERT H ,  DEVERSE FRANK T

IPC: C08L7/00 ,  C08K5/04 ,  C08L21/00 ,  G03F7/008 ,  G03F7/038 ,  H01L21/027 ,  H01L23/29 ,  H01L7/00 ,  H01L7/34

CPC classification number: G03F7/0085 ,  H01L23/293 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of providing high output monolithic semiconductor devices wherein a silicon dioxide layer is coated with a photoresist material containing a highly volatile, low molecular weight, ester-type plasticizer.

公开(公告)号：US3549368A

公开(公告)日：1970-12-22

申请号：US3549368D

申请日：1968-07-02

Applicant: IBM

Inventor： COLLINS ROBERT H ,  DEVERSE FRANK T

IPC: G03F7/075 ,  H01L21/312 ,  H01L29/00 ,  G03C5/00

CPC classification number: H01L21/3121 ,  G03F7/0751 ,  H01L21/312 ,  H01L29/00 ,  Y10S430/136

Abstract: 1,262,513. Improvements in photo-resist adhesion. INTERNATIONAL BUSINESS MACHINES CORP. June 23, 1969 [July 2, 1968], No.31561/69. Heading G2C. A coating of photo-resist material is applied to an oxide surface with a hexa-alkyldisilazane containing adhesive. The surface may be a silicon oxide surface, and the hexa-alkyldisilazane may be hexamethyl- or hexaethyldisilazane. The photoresist material preferably contains polyvinyl annaniate, polyisoprene, natural rubber resin, formaldehyde novolak, cinnamylidene or polyacrylic ester, and may be a partially cyclized polymer of cis-1, 4-isoprene having an average molecular weight of 60 000 to 70 000 and an azide photoinitiator. The oxide surface may be precoated with the adhesive and the photo-resist material applied to the adhesive, or the adhesive may be admixed with the photo-resist material and the admixture applied to the oxide surface. The invention is described principally in terms of preparing semi-conductor devices, but has general applicability to any process which requires application of a photo-resist to an oxide surface. This invention prevents the tendency of the exposed and developed photo-resist coating to curl away from the substrate.