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    Error-free decoding for failure-tolerant memories
    5.
    发明授权
    Error-free decoding for failure-tolerant memories 失效
    无错误解码失败的记忆

    公开(公告)号：US3688265A

    公开(公告)日：1972-08-29

    申请号：US3688265D

    申请日：1971-03-18

    申请人： IBM

    发明人： CARTER WILLIAM C ,  HENLE ROBERT A ,  JESSEP DONALD C JR ,  WADIA ASPI B

    IPC分类号： G06F11/10 ,  G06F11/267 ,  G08C25/00 ,  G06F11/00

    CPC分类号： G06F11/1044 ,  G06F11/2215

    摘要： A translator for a digital memory system which performs single error correction and double error detection (SEC/DED) upon the stored word in converting it into a parity-encoded form and in addition detects circuit failures in the translator itself. The translator also takes a parity-encoded word, checks the parity encoding, translates the word into an SEC/DED form and writes it into memory. The translator consists of a syndrome generator, a single error corrector, a double error detector, a byte parity encoder, a byte parity checker and a circuit to implement a check on the parity-encoded form of the word which is read. The paritycheck matrix used in formulating the SEC/DED encoded form of the word has the following properties: Property 1: The columns of the parity check matrix are a minimum Hamming distance of 2 apart. Property 2: Each column of the parity check matrix is odd weight. Property 3: If there are r check bits C(j), m bytes with parity bits P(i), and odd parity is used, then

    摘要翻译： 一种用于数字存储器系统的翻译器，其对存储的字执行单个纠错和双重错误检测（SEC / DED），将其转换为奇偶校验编码形式，并且还检测翻译器本身中的电路故障。 翻译器还采用奇偶校验编码的字，检查奇偶编码，将该字翻译成SEC / DED格式，并将其写入内存。 翻译器由校正子发生器，单个误差校正器，双重误差检测器，字节奇偶编码器，字节奇偶校验器和用于对读取的字的奇偶校验编码形式进行检查的电路组成。 用于制定SEC / DED编码形式的奇偶校验矩阵具有以下属性：