公开(公告)号：US3588839A

公开(公告)日：1971-06-28

申请号：US3588839D

申请日：1969-01-15

Applicant: IBM

Inventor： BELADY LASZLO A ,  KUEHNER CARL J ,  LEHMAN MEIR M ,  RANDELL BRIAN

IPC: G06F12/08 ,  G11C9/00 ,  G11C7/00

CPC classification number: G06F12/0804

Abstract: A COMPUTER MEMORY SYSTEM IN WHICH THE DATA IS TRANSFERRED BETWEEN HIGH-SPEED LOCAL STORAGE AND ONE OR MORE LEVELS OF A LARGER LOW SPEED STORAGE WHEREIN ALTERED DATA IS REWRITTEN IN HIGH-SPEED STORAGE IMMEDIATELY AND IN THE LOWSPEED STORAGE ON A CYCLE STEALING BASIS. CONTROLS ARE PROVIDED SO THAT WHEN A SMALL SEGMENT OF DATA IN A PARTICULAR BLOCK OR PAGE IN HIGH-SPEED STORE IS ALTERED AND INDICATOR IS SET. WHEN MEMORY BUSS TIME IS AVAILABLE TO THE LOW SPEED OR BACKUP STORE THESE INDICATORS WILL BE CHECKED AND WORDS OR LINES REWRITTEN IN SAID BACKUP STORE AS LONG AS A HIGHER PRIORITY JOB IS NOT ENCOUNTERED. WHEN IT IS DESIRED TO REPLACE A COMPLETE PAGE IN HIGH-SPEED STORAGE, INDICATORS FOR THAT PAGE ARE CHECKED AND ALL ALTERED WORDS ARE REWRITTEN IMMEDIATEDLY IN THE BACKUP STORE ON A HIGH PRIORITY BASIS AFTER WHICH THE PAGE IN THE HIGH-SPEED STORE MAY BE OVERWRITTER WITH NEW DATA FROM THE BACKUP STORE.

公开(公告)号：US3577189A

公开(公告)日：1971-05-04

申请号：US3577189D

申请日：1969-01-15

Applicant: IBM

Inventor： COCKE JOHN ,  RANDELL BRIAN ,  SCHORR HERBERT ,  SUSSENGUTH EDWARD H

IPC: G06F9/32 ,  G06F9/38 ,  G06F9/00 ,  G06F9/16

CPC classification number: G06F9/3846

Abstract: Apparatus and a method in a digital computer is disclosed for allowing improved program branching from a first instruction sequence to a second instruction sequence. Said apparatus includes means for decoding a branch instruction in said first sequence; means for determining parameters which are to enter into a condition determination, the resolution of which defines whether or not the branch is to be made, means for detecting a specific type instruction in said first sequence subsequent to said branch instruction, said specific type instruction indicative of the point in the first instruction sequence at which the branch is to be made; and means responsive to said detection for ordering instructions from said second instruction sequence to be processed subsequent to the processing of said specific type instruction.

公开(公告)号：US3541528A

公开(公告)日：1970-11-17

申请号：US3541528D

申请日：1969-01-06

Applicant: IBM

Inventor： RANDELL BRIAN

IPC: G06F9/32 ,  G06F9/38 ,  G06F9/00 ,  G06F9/20

CPC classification number: G06F9/381 ,  G06F9/325