公开(公告)号：US11264271B2

公开(公告)日：2022-03-01

申请号：US17081337

申请日：2020-10-27

Applicant: IMEC VZW

Inventor： Martin O'Toole ,  Zsolt Tokei ,  Christopher Wilson ,  Stefan Decoster

IPC: H01L21/768 ,  H01L21/033 ,  H01L23/538

Abstract: A method is provided for producing electrically conductive lines (23a, 23b), wherein spacers are deposited on a sacrificial structure present on a stack of layers, including a hardmask layer on top of a dielectric layer into which the lines are to be embedded, and an intermediate layer on top of the hardmask layer. A self-aligned litho-etch step is then performed to create an opening in the intermediate layer, the opening being self-aligned to the space between two adjacent sidewalls of the sacrificial structure. This self-aligned step precedes the deposition of spacers on the sacrificial structure, so that spacers are also formed on the transverse sidewalls of the opening, i.e. perpendicular to the spacers on the walls of the sacrificial structure. A blocking material is provided in the area of the bottom of the opening that is surrounded on all sides by spacers, thereby creating a block with a reduced size.

公开(公告)号：US20210193512A1

公开(公告)日：2021-06-24

申请号：US17081337

申请日：2020-10-27

Applicant: IMEC VZW

Inventor： Martin O'Toole ,  Zsolt Tokei ,  Christopher Wilson ,  Stefan Decoster

IPC: H01L21/768 ,  H01L23/538 ,  H01L21/033

Abstract: A method is provided for producing electrically conductive lines (23a, 23b), wherein spacers are deposited on a sacrificial structure present on a stack of layers, including a hardmask layer on top of a dielectric layer into which the lines are to be embedded, and an intermediate layer on top of the hardmask layer. A self-aligned litho-etch step is then performed to create an opening in the intermediate layer, the opening being self-aligned to the space between two adjacent sidewalls of the sacrificial structure. This self-aligned step precedes the deposition of spacers on the sacrificial structure, so that spacers are also formed on the transverse sidewalls of the opening, i.e. perpendicular to the spacers on the walls of the sacrificial structure. A blocking material is provided in the area of the bottom of the opening that is surrounded on all sides by spacers, thereby creating a block with a reduced size.

公开(公告)号：US11270912B2

公开(公告)日：2022-03-08

申请号：US17110631

申请日：2020-12-03

Applicant: IMEC VZW

Inventor： Martin O'Toole ,  Christopher Wilson ,  Zsolt Tokei ,  Ryan Ryoung han Kim

IPC: H01L21/768

Abstract: Example embodiments relate to methods for forming via holes self-aligned with metal blocks on substrates. One embodiment includes a method where the substrate includes an interlayer dielectric layer. The method includes forming a metallic layer on the interlayer dielectric layer. The method also includes forming a dielectric layer on the metallic layer and forming a plurality of parallel spacer line structures on the dielectric layer. In addition, the method includes forming a sidewall oxide, a first sacrificial layer, and an opening in the first sacrificial layer. Further, the method includes etching the dielectric layer and removing the first sacrificial layer. Additionally, the method includes forming a second sacrificial layer, forming an opening in the second sacrificial layer, depositing a metal block on the metallic layer, and removing the second sacrificial layer. Still further, the method includes etching the metallic layer and the interlayer dielectric layer to form a via hole.

公开(公告)号：US20210183698A1

公开(公告)日：2021-06-17

申请号：US17110631

申请日：2020-12-03

Applicant: IMEC VZW

Inventor： Martin O'Toole ,  Christopher Wilson ,  Zsolt Tokei ,  Ryan Ryoung han Kim

IPC: H01L21/768

Abstract: Example embodiments relate to methods for forming via holes self-aligned with metal blocks on substrates. One embodiment includes a method where the substrate includes an interlayer dielectric layer. The method includes forming a metallic layer on the interlayer dielectric layer. The method also includes forming a dielectric layer on the metallic layer and forming a plurality of parallel spacer line structures on the dielectric layer. In addition, the method includes forming a sidewall oxide, a first sacrificial layer, and an opening in the first sacrificial layer. Further, the method includes etching the dielectric layer and removing the first sacrificial layer. Additionally, the method includes forming a second sacrificial layer, forming an opening in the second sacrificial layer, depositing a metal block on the metallic layer, and removing the second sacrificial layer. Still further, the method includes etching the metallic layer and the interlayer dielectric layer to form a via hole.