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公开(公告)号：US20160041862A1
公开(公告)日：2016-02-11
申请号：US14881496
申请日：2015-10-13
Applicant: Infineon Technologies AG
Inventor： Karl Herz , Ljudmil Anastasov , Harald Zweck
CPC classification number: G06F11/0757 , G06F5/065 , G06F5/12 , G06F11/0721 , G06F11/0745 , G06F11/079 , G06F11/3024 , G06F11/3027 , G06F11/3495 , G06F13/4282
Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.
Abstract translation: 实施例涉及用于并发命令或并行通信信道的超时监视的系统和方法，包括当相应的命令要被发送时，将多个超时定时器中的每个命令或通信信道的每个命令或通信信道分配或解除分配给命令或命令确认 分别收到
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公开(公告)号：US11945451B2
公开(公告)日：2024-04-02
申请号：US16509639
申请日：2019-07-12
Applicant: Infineon Technologies AG
Inventor： Alexander Zeh , Harald Zweck
CPC classification number: B60W50/0205 , B60W50/04 , B60G2800/80 , B60W2050/021 , B60W2510/18
Abstract: An electronic anomaly detection unit for use in a vehicle includes an input component for capturing an input variable, wherein the input variable contains state information for at least one component of the vehicle, a memory component for storing state values based on the input variable, a selection component for selecting selected state values from the stored state values, an association component for associating the selected state values with predefined values, wherein the predefined values define a normal state of the component of the vehicle, and a decision component for deciding whether there is an anomalous behavior in the at least one component of the vehicle, based on the association, wherein one or more of the input component, the memory component, the selection component, the association component and the decision component are implemented in hardware.
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公开(公告)号：US11816201B2
公开(公告)日：2023-11-14
申请号：US17661590
申请日：2022-05-02
Applicant: Infineon Technologies AG
Inventor： Alexander Zeh , Harald Zweck
CPC classification number: G06F21/44 , G06F21/602 , H04L9/14
Abstract: The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.
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公开(公告)号：US11705987B2
公开(公告)日：2023-07-18
申请号：US17333365
申请日：2021-05-28
Applicant: Infineon Technologies AG
Inventor： Wai Keung Frankie Chan , Klaus Scheibert , Harald Zweck
CPC classification number: H04L1/0045 , H04L1/0061 , H04L1/201
Abstract: An apparatus for handling an incoming communication data frame containing a plurality of bits is provided. The apparatus may include a plurality of data matchers, each data matcher configured to compare a subset of the plurality of bits of the communication data frame with a predetermined data pattern of a plurality of data patterns and to provide a data matcher output to indicate the result of the data matcher comparison, a plurality of selectors, each selector configured to compare a subset of the data matcher outputs of the plurality of data matchers with a predetermined selection pattern of a plurality of selection patterns and to provide a selector output to indicate the result of the selector comparison, and a frame filter configured to transfer the incoming frame to application logic only if the selector outputs of the plurality of selectors match a predetermined filter pattern, and to also transfer the selector outputs of the plurality of selectors to the application logic.
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公开(公告)号：US20170293519A1
公开(公告)日：2017-10-12
申请号：US15631544
申请日：2017-06-23
Applicant: Infineon Technologies AG
Inventor： Karl Herz , Ljudmil Anastasov , Harald Zweck
CPC classification number: G06F11/0757 , G06F5/065 , G06F5/12 , G06F11/0721 , G06F11/0745 , G06F11/079 , G06F11/3024 , G06F11/3027 , G06F11/3495 , G06F13/4282
Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.
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Patent Agency Ranking
公开(公告)号：US09727400B2
公开(公告)日：2017-08-08
申请号：US14881496
申请日：2015-10-13
Applicant: Infineon Technologies AG
Inventor： Karl Herz , Ljudmil Anastasov , Harald Zweck
CPC classification number: G06F11/0757 , G06F5/065 , G06F5/12 , G06F11/0721 , G06F11/0745 , G06F11/079 , G06F11/3024 , G06F11/3027 , G06F11/3495 , G06F13/4282
Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.
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公开(公告)号：US09569384B2
公开(公告)日：2017-02-14
申请号：US13803811
申请日：2013-03-14
Applicant: Infineon Technologies AG
Inventor： Frank Hellwig , Simon Cottam , Harald Zweck
IPC: G06F13/28
CPC classification number: G06F13/28
Abstract: Some embodiments relate to a Direct Memory Access (DMA) controller. The DMA controller includes a bus controller having a system bus interface and configured to read a pattern from a memory location via the system bus interface. Pattern comparison logic compares the read pattern to at least one predetermined pattern. Control logic induces the bus controller to process a first conditional link over the system bus interface if the read pattern differs from the predetermined pattern, and induces the bus controller to process a second conditional link over the system bus interface if the read pattern differs from the predetermined pattern.
Abstract translation: 一些实施例涉及直接存储器访问（DMA）控制器。 DMA控制器包括具有系统总线接口并被配置为经由系统总线接口从存储器位置读取模式的总线控制器。 图案比较逻辑将读取图案与至少一个预定图案进行比较。 如果读取模式与预定模式不同，则控制逻辑引起总线控制器处理系统总线接口上的第一条件链路，并且如果读取模式与系统总线接口不同，则总线控制器通过系统总线接口处理第二条件链路 预定模式。
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公开(公告)号：US20220255963A1
公开(公告)日：2022-08-11
申请号：US17597460
申请日：2020-06-16
Applicant: Infineon Technologies AG
Inventor： Alexander Zeh , Harald Zweck
Abstract: The present disclosure relates to authenticity and data security for bus based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.
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公开(公告)号：US20250053527A1
公开(公告)日：2025-02-13
申请号：US18366968
申请日：2023-08-08
Applicant: Infineon Technologies AG
Inventor： Tobias Islinger , Harald Zweck
IPC: G06F13/28
Abstract: Some aspects of the present disclosure relate to a network processor. The network processor includes a system bus, a central processing unit (CPU) coupled to the system bus, a random access memory (RAM) coupled to the CPU via the system bus; a plurality of network ports coupled to the CPU and the RAM; and a network bridge coupled between the CPU and the plurality of network ports. The network bridge includes a first transmit Direct Memory Access (DMA) circuit and a first transmit memory buffer coupled between the first transmit DMA circuit and a first network port, and a receive memory buffer and frame parser hardware arranged between the receive memory buffer and the system bus.
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公开(公告)号：US12034749B2
公开(公告)日：2024-07-09
申请号：US17408942
申请日：2021-08-23
Applicant: Infineon Technologies AG
Inventor： Lin Li , Varun Kumar , Harald Zweck
CPC classification number: H04L63/1425 , G06F13/4221 , H04L63/1416 , H04L63/1466 , H04L63/166 , G06F2213/0026
Abstract: A traffic anomaly detector of a Peripheral Component Interconnect express (PCIe) system, including filters configured to filter headers of PCIe transaction layer packets (TLPs) based on respective filter criterion; a classifier configured to trigger an event based on one of the filter criterion or a logical combination of a plurality of the filter criteria; an event counter configured to count a number of the events; and a processor configured to detect, based on a value of the event counter, an anomaly in the PCIe TLP traffic.
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