公开(公告)号：US20160118211A1

公开(公告)日：2016-04-28

申请号：US14526164

申请日：2014-10-28

Applicant: Infineon Technologies AG

Inventor： Paolo Del Croce ,  Robert Illing ,  Alexander Mayer

IPC: H01H47/00

CPC classification number: H03K17/28 ,  H03K17/18 ,  H03K2217/0009

Abstract: In one example, a method includes receiving, at a first time by a power switching device via an input connector of the power switching device, a signal that causes the power switching device to output a power signal to a load via an output connector of the power switching device. In this example, a voltage level of the power signal satisfies a voltage threshold at a second time that is later than the first time. In this example, the method also includes communicating, by the power switching device and during a time period between the first time and the second time, with an external device via the input connector.

Abstract translation: 在一个示例中，一种方法包括：通过功率开关装置的输入连接器在第一时间由电力开关装置接收使得电力开关装置通过电力开关装置的输出连接器向负载输出功率信号的信号 电源开关装置 在该示例中，功率信号的电压电平在比第一次晚的第二时间满足电压阈值。 在该示例中，该方法还包括通过电力开关装置以及在第一时间和第二时间之间的时间段期间经由输入连接器与外部设备进行通信。

公开(公告)号：US20160056280A1

公开(公告)日：2016-02-25

申请号：US14466198

申请日：2014-08-22

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Paolo Del Croce ,  Luca Petruzzi ,  Norbert Krischke

IPC: H01L29/78 ,  H01L27/06 ,  H01L29/06

CPC classification number: H01L29/7811 ,  H01L21/765 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L27/0922 ,  H01L29/0607 ,  H01L29/0688 ,  H01L29/7805

Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes a power device well in a semiconductor substrate, a logic device well in the substrate and spaced apart from the power device well by a separation region of the substrate, and a minority carrier conversion structure including a first doped region of a first conductivity type in the separation region, a second doped region of a second conductivity type in the separation region and a conducting layer connecting the first and second doped regions. The second doped region includes a first part interposed between the first doped region and the power device well and a second part interposed between the first doped region and the logic device well.

Abstract translation: 根据半导体器件的实施例，半导体器件在半导体衬底中包括良好的功率器件，在衬底中良好的逻辑器件，并且通过衬底的分离区与阱与阱的间隔开，并且少数载流子转换 在分离区域中包括第一导电类型的第一掺杂区域，在分离区域中具有第二导电类型的第二掺杂区域和连接第一和第二掺杂区域的导电层。 第二掺杂区域包括插入在第一掺杂区域和功率器件阱之间的第一部分和插入在第一掺杂区域和逻辑器件阱之间的第二部分。

公开(公告)号：US12222377B2

公开(公告)日：2025-02-11

申请号：US18296878

申请日：2023-04-06

Applicant: Infineon Technologies AG

Inventor： Albino Pidutti ,  Andrea Baschirotto ,  Paolo Del Croce

IPC: G01R19/10 ,  H03K17/56

Abstract: A method for current measurement in a switching converter is described herein. In accordance with one embodiment, the method includes switching a first transistor on and off in accordance with a logic signal, wherein a load current passes through the first transistor while it is switched on. The method further includes providing—by a second transistor—a sense current that is indicative of the load current, wherein the second transistor is coupled to the first transistor so that the first and the second transistors are switched on and off simultaneously. Further, the method includes determining an end of a switch-on phase of the second transistor, and providing a current sense signal that represents the sense current between a first time instant, which corresponds to the determined end of the switch-on phase, and a second time instant, at which the logic signal signals a switch-off of the first transistor.

公开(公告)号：US10433378B1

公开(公告)日：2019-10-01

申请号：US16248614

申请日：2019-01-15

Applicant: Infineon Technologies AG

Inventor： Paolo Del Croce ,  Albino Pidutti ,  Andrea Baschirotto ,  Osvaldo Gasparri

IPC: H05B33/08 ,  H02M1/08 ,  H02M3/156 ,  H02M1/00

Abstract: A controller circuit is configured to drive a switching element to establish a channel that electrically couples a source to an inductive element of a buck converter and generate a minimum current sample. In response to current at the switching element exceeding a target peak current threshold of a set of control parameters for the buck converter, the controller circuit is configured to generate a peak current sample, calculate a mean current using the minimum current sample and the peak current sample, and modify the set of control parameters using the mean current. In response to the switching element satisfying an off time of the set of control parameters, the controller circuit is configured to drive the switching element to establish the channel that electrically couples the source to the inductive element during an on state for a subsequent switching period.

公开(公告)号：US09590091B2

公开(公告)日：2017-03-07

申请号：US14466198

申请日：2014-08-22

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Paolo Del Croce ,  Luca Petruzzi ,  Norbert Krischke

IPC: H01L27/108 ,  H01L29/78 ,  H01L27/06 ,  H01L29/06 ,  H01L27/092 ,  H01L21/8238

CPC classification number: H01L29/7811 ,  H01L21/765 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L27/0922 ,  H01L29/0607 ,  H01L29/0688 ,  H01L29/7805

Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes a power device well in a semiconductor substrate, a logic device well in the substrate and spaced apart from the power device well by a separation region of the substrate, and a minority carrier conversion structure including a first doped region of a first conductivity type in the separation region, a second doped region of a second conductivity type in the separation region and a conducting layer connecting the first and second doped regions. The second doped region includes a first part interposed between the first doped region and the power device well and a second part interposed between the first doped region and the logic device well.

Abstract translation: 根据半导体器件的实施例，半导体器件在半导体衬底中包括良好的功率器件，在衬底中良好的逻辑器件，并且通过衬底的分离区与阱与阱的间隔开，并且少数载流子转换 在分离区域中包括第一导电类型的第一掺杂区域，在分离区域中具有第二导电类型的第二掺杂区域和连接第一和第二掺杂区域的导电层。 第二掺杂区域包括插入在第一掺杂区域和功率器件阱之间的第一部分和插入在第一掺杂区域和逻辑器件阱之间的第二部分。

公开(公告)号：US09245888B2

公开(公告)日：2016-01-26

申请号：US13631924

申请日：2012-09-29

Applicant: Infineon Technologies AG

Inventor： Luca Petruzzi ,  Bernhard Auer ,  Paolo Del Croce ,  Markus Ladurner

IPC: H01L29/78 ,  H01L27/092 ,  H01L27/02 ,  H03K17/0814 ,  H01L29/423

CPC classification number: H01L27/0922 ,  H01L27/0248 ,  H01L29/42368 ,  H01L29/7813 ,  H01L2924/0002 ,  H03K17/08142 ,  H01L2924/00

Abstract: A semiconductor device is disclosed. In accordance with a first aspect of the present invention the device includes a semiconductor chip having a substrate, a first supply terminal electrically coupled to the substrate to provide a first supply potential (VS) and a load current to the substrate, and a second supply terminal operably provided with a second supply potential. A first vertical transistor is integrated in the semiconductor chip and electrically coupled between the supply terminal and an output terminal. The first vertical transistor is configured to provide a current path for the load current to the output terminal in accordance with a control signal, which is provided to a gate electrode of the first vertical transistor.

Abstract translation: 公开了一种半导体器件。 根据本发明的第一方面，该器件包括具有衬底的半导体芯片，与衬底电耦合以提供第一电源电位（VS）和向衬底提供负载电流的第一电源端子，以及第二电源 端子可操作地设置有第二电源电位。 第一垂直晶体管集成在半导体芯片中并电耦合在电源端子和输出端子之间。 第一垂直晶体管被配置为根据提供给第一垂直晶体管的栅电极的控制信号为输出端提供负载电流的电流路径。

公开(公告)号：US09748945B2

公开(公告)日：2017-08-29

申请号：US14526164

申请日：2014-10-28

Applicant: Infineon Technologies AG

Inventor： Paolo Del Croce ,  Robert Illing ,  Alexander Mayer

IPC: H03K17/28 ,  H03K17/18

CPC classification number: H03K17/28 ,  H03K17/18 ,  H03K2217/0009

Abstract: In one example, a method includes receiving, at a first time by a power switching device via an input connector of the power switching device, a signal that causes the power switching device to output a power signal to a load via an output connector of the power switching device. In this example, a voltage level of the power signal satisfies a voltage threshold at a second time that is later than the first time. In this example, the method also includes communicating, by the power switching device and during a time period between the first time and the second time, with an external device via the input connector.

公开(公告)号：US20130106395A1

公开(公告)日：2013-05-02

申请号：US13725553

申请日：2012-12-21

Applicant: Infineon Technologies AG

Inventor： Paolo Del Croce

IPC: G05F3/02

CPC classification number: G05F3/02 ,  G05F3/24

Abstract: A system and method for providing an accurate current reference using a low-power current source is disclosed. A preferred embodiment comprises a system comprises a first section and a second section. The first section comprises a first simple current reference, an accurate current reference, and a circuit that generates a digital error signal based upon a comparison of an output of the first simple current reference and an output of the accurate current reference. The second section comprises a second simple current reference providing a second reference current, an adjustment circuit providing an adjustment current based upon the digital error signal, and a circuit biased with current equivalent to a summation of the second reference current and the adjustment current. The first simple current reference and the second simple current reference may be equivalent circuits.

公开(公告)号：US20230375599A1

公开(公告)日：2023-11-23

申请号：US18296878

申请日：2023-04-06

Applicant: Infineon Technologies AG

Inventor： Albino Pidutti ,  Andrea Baschirotto ,  Paolo Del Croce

IPC: G01R19/10 ,  H03K17/56

CPC classification number: G01R19/10 ,  H03K17/56

Abstract: A method for current measurement in a switching converter is described herein. In accordance with one embodiment, the method includes switching a first transistor on and off in accordance with a logic signal, wherein a load current passes through the first transistor while it is switched on. The method further includes providing—by a second transistor—a sense current that is indicative of the load current, wherein the second transistor is coupled to the first transistor so that the first and the second transistors are switched on and off simultaneously. Further, the method includes determining an end of a switch-on phase of the second transistor, and providing a current sense signal that represents the sense current between a first time instant, which corresponds to the determined end of the switch-on phase, and a second time instant, at which the logic signal signals a switch-off of the first transistor.

公开(公告)号：US08598935B2

公开(公告)日：2013-12-03

申请号：US13725553

申请日：2012-12-21

Applicant: Infineon Technologies AG

Inventor： Paolo Del Croce

IPC: H03K5/00

CPC classification number: G05F3/02 ,  G05F3/24

Abstract: A system and method for providing an accurate current reference using a low-power current source is disclosed. A preferred embodiment comprises a system comprises a first section and a second section. The first section comprises a first simple current reference, an accurate current reference, and a circuit that generates a digital error signal based upon a comparison of an output of the first simple current reference and an output of the accurate current reference. The second section comprises a second simple current reference providing a second reference current, an adjustment circuit providing an adjustment current based upon the digital error signal, and a circuit biased with current equivalent to a summation of the second reference current and the adjustment current. The first simple current reference and the second simple current reference may be equivalent circuits.

Abstract translation: 公开了一种使用低功率电流源提供精确电流参考的系统和方法。 优选实施例包括一个包括第一部分和第二部分的系统。 第一部分包括第一简单电流基准，精确电流基准，以及基于第一简单电流基准的输出与精确电流基准的输出的比较来产生数字误差信号的电路。 第二部分包括提供第二参考电流的第二简单电流参考，基于数字误差信号提供调节电流的调节电路和用等于第二参考电流和调整电流的总和的电流偏置的电路。 第一简单电流基准和第二简单电流基准可以是等效电路。