公开(公告)号：US20220391250A1

公开(公告)日：2022-12-08

申请号：US17891916

申请日：2022-08-19

Applicant: Intel Corporation

Inventor： John J. BROWNE ,  Chris MACNAMARA

IPC: G06F9/48 ,  G06F9/455

Abstract: Examples described herein relate to determination of per-virtualized execution environment power usage based on an identifier of a processor that executes at least two virtualized execution environments, power usage of the processor, and number of virtualized execution environments executed by the processor.

公开(公告)号：US20210320870A1

公开(公告)日：2021-10-14

申请号：US17356420

申请日：2021-06-23

Applicant: Intel Corporation

Inventor： Patrick CONNOR ,  Andrey CHILIKIN ,  Brendan RYAN ,  Chris MACNAMARA ,  John J. BROWNE ,  Krishnamurthy JAMBUR SATHYANARAYANA ,  Stephen DOYLE ,  Tomasz KANTECKI ,  Anthony KELLY ,  Ciara LOFTUS ,  Fiona TRAHE

IPC: H04L12/803 ,  G06F9/455 ,  H04L12/851 ,  H04L12/26 ,  G06F8/76

Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.

公开(公告)号：US20240143505A1

公开(公告)日：2024-05-02

申请号：US18393793

申请日：2023-12-22

Applicant: Intel Corporation

Inventor： Amruta MISRA ,  Ajay RAMJI ,  Rajendrakumar CHINNAIYAN ,  Chris MACNAMARA ,  Karan PUTTANNAIAH ,  Pushpendra KUMAR ,  Vrinda KHIRWADKAR ,  Sanjeevkumar Shankrappa ROKHADE ,  John J. BROWNE ,  Francesc GUIM BERNAT ,  Karthik KUMAR ,  Farheena Tazeen SYEDA

IPC: G06F12/0811

CPC classification number: G06F12/0811

Abstract: Methods and apparatus for dynamic selection of super queue size for CPUs with higher number of cores. An apparatus includes a plurality of compute modules, each module including a plurality of processor cores with integrated first level (L1) caches and a shared second level (L2) cache, a plurality of Last Level Caches (LLCs) or LLC blocks and a plurality of memory interface blocks interconnect via a mesh interconnect. A compute module is configured to arbitrate access to the shared L2 cache and enqueue L2 cache misses in a super queue (XQ). The compute module further is configured to dynamically adjust the size of the XQ during runtime operations. The compute module tracks parameters comprising an L2 miss rate or count and LLC hit latency and adjusts the XQ size as a function of these parameters. A lookup table using the L2 miss rate/count and LLC hit latency may be implemented to dynamically select the XQ size.

公开(公告)号：US20230153121A1

公开(公告)日：2023-05-18

申请号：US18095998

申请日：2023-01-11

Applicant: Intel Corporation

Inventor： Yuzhang LUO ,  Haoxiang SUN ,  Siming WAN ,  Laurent COQUEREL ,  John J. BROWNE ,  Chris MACNAMARA ,  Fei Z. WANG

IPC: G06F9/445 ,  G06F11/34

CPC classification number: G06F9/44505 ,  G06F11/3409

Abstract: A machine-readable storage medium having program code that when processed by one or more processing cores causes a method to be performed. The method includes determining from program code that is scheduled for execution and/or is being scheduled for execution that an accelerator is expected to be invoked by the program code. The program code to implement one or more application software processes. The method also includes, in response to the determining, causing the accelerator to wake up from a sleep state before the accelerator is first invoked from the program code's execution.

公开(公告)号：US20190199646A1

公开(公告)日：2019-06-27

申请号：US16287339

申请日：2019-02-27

Applicant: Intel Corporation

Inventor： Jasvinder SINGH ,  John J. BROWNE ,  Tomasz KANTECKI ,  Chris MACNAMARA

IPC: H04L12/869 ,  H04L12/873 ,  H04L12/863 ,  H04L12/877 ,  H04L12/861 ,  H04L12/927 ,  H04L12/911

CPC classification number: H04L47/58 ,  H04L47/522 ,  H04L47/525 ,  H04L47/60 ,  H04L47/6215 ,  H04L47/74 ,  H04L47/805 ,  H04L47/808 ,  H04L49/9031

Abstract: Packets are differentiated based on their traffic class. A traffic class is allocated bandwidth for transmission. One or more core or thread can be allocated to process packets of a traffic class for transmission based on allocated bandwidth for that traffic class. If multiple traffic classes are allocated bandwidth, and a traffic class underutilizes allocated bandwidth or a traffic class is allocated insufficient bandwidth, then allocated bandwidth can be adjusted for a future transmission time slot. For example, a higher priority traffic class with excess bandwidth can share the excess bandwidth with a next highest priority traffic class for use to allocate packets for transmission for the same time slot. In the same or another example, bandwidth allocated to a traffic class depends on an extent of insufficient allocation or underutilization of allocated bandwidth such that a traffic class with insufficient allocated bandwidth in one or more prior time slot can be provided more bandwidth in a current time slot and a traffic class with underutilization of allocated bandwidth can be provided with less allocated bandwidth for a current time slot.

公开(公告)号：US20230035142A1

公开(公告)日：2023-02-02

申请号：US17966441

申请日：2022-10-14

Applicant: Intel Corporation

Inventor： Chris MACNAMARA ,  David HUNT ,  Kevin LAATZ ,  Anatoly BURAKOV ,  Bruce RICHARDSON ,  Conor WALSH ,  John J. BROWNE

IPC: G06F9/50

Abstract: A method is described. The method includes polling a queue a plurality of times over a plurality of intervals, where, the queue feeds work items to a processor. The method includes determining, from the polling, respective work item flow metrics for the plurality of intervals. The method includes determining a processor's performance setting based on the plurality of respective work item flow metrics.

公开(公告)号：US20230027516A1

公开(公告)日：2023-01-26

申请号：US17957723

申请日：2022-09-30

Applicant: Intel Corporation

Inventor： Tomasz KANTECKI ,  Paul HOUGH ,  David CREMINS ,  Ciara LOFTUS ,  Aman Deep SINGH ,  John J. BROWNE ,  David HUNT ,  Maksim LUKOSHKOV ,  Amruta MISRA ,  Nirint SHAH ,  Chris MACNAMARA

IPC: G06F13/14 ,  H04L1/18

Abstract: A processor-to-processor agent to provide connectivity over a processor-to-processor interconnect between services/network functions on different processors on a same compute node in a server is provided. The processor-to-processor agent can intercept socket interface calls using a network traffic filter in the network stack and redirect the packets based on traffic matching rules.

公开(公告)号：US20210014324A1

公开(公告)日：2021-01-14

申请号：US17031659

申请日：2020-09-24

Applicant: Intel Corporation

Inventor： Andrey CHILIKIN ,  Tomasz KANTECKI ,  Chris MACNAMARA ,  John J. BROWNE ,  Declan DOHERTY ,  Niall POWER

IPC: H04L29/08 ,  H04L12/24 ,  H04L12/26 ,  G06F12/0862 ,  G06F1/28

Abstract: Examples described herein relate to a network interface apparatus that includes an interface; circuitry to determine whether to store content of a received packet into a cache or into a memory, at least during a configuration of the network interface to store content directly into the cache, based at least in part on a fill level of a region of the cache allocated to receive copies of packet content directly from the network interface; and circuitry to store content of the received packet into the cache or the memory based on the determination, wherein the cache is external to the network interface. In some examples, the network interface is to determine to store content of the received packet into the memory based at least in part on a fill level of the region of the cache being identified as full or determine to store content of the received packet into the cache based at least in part on a fill level of the region of the cache being identified as not filled. In some examples, the network interface is to indicate a complexity level of content of the received packet to cause adjustment of a power usage level of a processor that is to process the content of the received packet.

公开(公告)号：US20190042454A1

公开(公告)日：2019-02-07

申请号：US16024611

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Tomasz KANTECKI ,  John BROWNE ,  Chris MACNAMARA ,  Timothy VERRALL ,  Marcel CORNU ,  Eoin WALSH ,  Andrew J. HERDRICH

IPC: G06F12/0891 ,  G06F9/50 ,  G06F9/455

Abstract: Examples include techniques to manage cache resource allocations associated with one or more cache class of service (CLOS) assignments for a processor cache. Examples include flushing portions of an allocated cache resource responsive to reassignments of CLOS.

公开(公告)号：US20240089206A1

公开(公告)日：2024-03-14

申请号：US18513261

申请日：2023-11-17

Applicant: Intel Corporation

Inventor： Patrick CONNOR ,  Andrey CHILIKIN ,  Brendan RYAN ,  Chris MACNAMARA ,  John J. BROWNE ,  Krishnamurthy JAMBUR SATHYANARAYANA ,  Stephen DOYLE ,  Tomasz KANTECKI ,  Anthony KELLY ,  Ciara LOFTUS ,  Fiona TRAHE

IPC: H04L47/125 ,  G06F8/76 ,  G06F9/455 ,  H04L43/0817 ,  H04L47/2441

CPC classification number: H04L47/125 ,  G06F8/76 ,  G06F9/455 ,  H04L43/0817 ,  H04L47/2441

Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.