公开(公告)号：US11342499B2

公开(公告)日：2022-05-24

申请号：US16630845

申请日：2017-09-18

Applicant: Intel Corporation

Inventor： Timothy E. Glassman ,  Dragos Seghete ,  Nathan Strutt ,  Namrata S. Asuri ,  Oleg Golonzka

IPC: H01L29/02 ,  H01L45/00 ,  G11C13/00 ,  H01L23/522 ,  H01L23/528 ,  H01L27/24

Abstract: Approaches for fabricating RRAM stacks with reduced forming voltage, and the resulting structures and devices, are described. In an example, a resistive random access memory (RRAM) device includes a conductive interconnect in an inter-layer dielectric (ILD) layer above a substrate. An RRAM element is on the conductive interconnect, the RRAM element including a first electrode layer on the uppermost surface of the conductive interconnect. A resistance switching layer is on the first electrode layer, the resistance switching layer including a first metal oxide material layer on the first electrode layer, and a second metal oxide material layer on the first metal oxide material layer, the second metal oxide material layer including a metal species not included in the first metal oxide material layer. An oxygen exchange layer is on the second metal oxide material layer of the resistance switching layer. A second electrode layer is on the oxygen exchange layer.

公开(公告)号：US11489112B2

公开(公告)日：2022-11-01

申请号：US16641582

申请日：2017-09-28

Applicant: INTEL CORPORATION

Inventor： Namrata S. Asuri ,  Oleg Golonzka ,  Nathan Strutt ,  Patrick J. Hentges ,  Trinh T. Van ,  Hiten Kothari ,  Ameya S. Chaudhari ,  Matthew J. Andrus ,  Timothy E. Glassman ,  Dragos Seghete ,  Christopher J. Wiegand ,  Daniel G. Ouellette

IPC: H01L45/00 ,  H01L23/528 ,  H01L27/24

Abstract: An apparatus, includes an interconnect, including a conductive material, above a substrate and a resistive random access memory (RRAM) device coupled to the interconnect. The RRAM device includes an electrode structure above the interconnect, where an upper portion of the electrode structure has a first width. The RRAM device further includes a switching layer on the electrode structure, where the switching layer has the first width and an oxygen exchange layer, having a second width less than the first width, on a portion of the switching layer. The RRAM device further includes a top electrode above the oxygen exchange layer, where the top electrode has the second width and an encapsulation layer on a portion of the switching layer, where the switching layer extends along a sidewall of the oxygen exchange layer.

公开(公告)号：US11430948B2

公开(公告)日：2022-08-30

申请号：US16641588

申请日：2017-09-28

Applicant: INTEL CORPORATION

Inventor： Timothy Glassman ,  Dragos Seghete ,  Nathan Strutt ,  Namrata S. Asuri ,  Oleg Golonzka ,  Hiten Kothari ,  Matthew J. Andrus

IPC: H01L45/00 ,  H01L27/24

Abstract: A memory device includes a bottom electrode above a substrate, a first switching layer on the bottom electrode, a second switching layer including aluminum on the first switching layer, an oxygen exchange layer on the second switching layer and a top electrode on the oxygen exchange layer. The presence of the second switching layer including aluminum on the first switching layer enables a reduction in electro-forming voltage of the memory device.