公开(公告)号：US20190006016A1

公开(公告)日：2019-01-03

申请号：US15638260

申请日：2017-06-29

Applicant: INTEL CORPORATION

Inventor： Ali KHAKIFIROOZ ,  Pranav KALAVADE ,  Shantanu R. RAJWADE ,  Aliasgar S. MADRASWALA ,  Uday CHANDRASEKHAR ,  Purval S. SULE ,  Sagar UPADHYAY

IPC: G11C16/34 ,  G11C16/10 ,  G11C8/06 ,  G11C8/10 ,  G06F11/14

Abstract: A programming of a memory device configurable to reach a plurality of voltage levels is initiated. For each voltage level to be reached, a checkpoint is set up within a sequence of program pulses applied for the programming of the memory device, to determine whether a plurality of memory cells of the memory device have reached the voltage level. The programming of the memory device is aborted, in response to determining at the checkpoint that the plurality of memory cells have not reached the voltage level.