公开(公告)号：US20190391922A1

公开(公告)日：2019-12-26

申请号：US16561352

申请日：2019-09-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce C. GIAMEI ,  Christian JACOBI ,  Daniel V. ROSA ,  Anthony SAPORITO ,  Donald W. SCHMIDT ,  Chung-Lung K. SHUM

IPC: G06F12/0875 ,  G06F12/084 ,  G06F12/0815 ,  G06F12/0862 ,  G06F12/0811 ,  G06F12/0842 ,  G06F12/1027

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：US20180349274A1

公开(公告)日：2018-12-06

申请号：US15820635

申请日：2017-11-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Giles R. FRAZIER ,  Michael K. GSCHWIND ,  Christian JACOBI ,  Younes MANTON ,  Anthony SAPORITO ,  Chung-Lung K. SHUM

IPC: G06F12/02 ,  G06F12/0802

CPC classification number: G06F12/0261 ,  G06F12/0802 ,  G06F2212/1044

Abstract: A garbage collection facility is provided for memory management within a computer. The facility implements, in part, grouping of infrequently accessed data units in a designated transient memory area, and includes designating an area of the memory as a transient memory area and an area as a conventional memory area, and counting, for each data unit in the transient or conventional memory areas a number of accesses to the data unit. The counting provides a respective access count for each data unit. For each data unit in the transient memory area or the conventional memory area, a determination is made whether the respective access count is below a transient threshold ascertained to separate frequently accessed data units and infrequently used data units. Data units with respective access counts below the transient threshold are grouped together as transient data units within the transient memory area.

公开(公告)号：US20230318286A1

公开(公告)日：2023-10-05

申请号：US17657989

申请日：2022-04-05

Applicant: International Business Machines Corporation

Inventor： Adam Benjamin COLLURA ,  Michael ROMAIN ,  William V. HUOTT ,  Pawel OWCZARCZYK ,  Christian JACOBI ,  Anthony SAPORITO ,  Chung-Lung K. SHUM ,  Alper BUYUKTOSUNOGLU ,  Tobias WEBEL ,  Michael Joseph CADIGAN, JR. ,  Paul Jacob LOGSDON ,  Sean Michael CAREY ,  Stefan PAYER ,  Karl Evan Smock ANDERSON ,  Mark CICHANOWSKI

IPC: H02H9/04 ,  G06F1/28

CPC classification number: H02H9/04 ,  G06F1/28

Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.

公开(公告)号：US20180196727A1

公开(公告)日：2018-07-12

申请号：US15402412

申请日：2017-01-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce C. GIAMEI ,  Christian JACOBI ,  Daniel V. ROSA ,  Anthony SAPORITO ,  Donald W. SCHMIDT

IPC: G06F11/34 ,  G06F9/48 ,  G06F11/30

CPC classification number: G06F11/3433 ,  G06F9/4881 ,  G06F9/5033 ,  G06F11/3024 ,  G06F11/3419 ,  G06F2201/88 ,  G06F2201/885 ,  G06F2209/508

Abstract: A facility is provided for collecting time-slice-instrumentation information during processing unit execution. The facility counts, at least in part, occurrence of a specified processing unit event during a time-slice of processing unit execution. The counted events occurring during a first interval of execution and a second interval of execution of the time-slice are retained. The first interval of execution is earlier in the time-slice than the second interval of execution, and the counted events facilitate adjusting performance of the processing unit. In an embodiment, the time-slice is a contiguous period of time of processing unit execution, and the specified processing unit event includes a cache event. The processing unit may interleave processing of multiple different units of work across multiple contiguous time-slices, and during a single time-slice, a single unit of work of the multiple different units of work is processed by the processing unit.

公开(公告)号：US20210096998A1

公开(公告)日：2021-04-01

申请号：US17117299

申请日：2020-12-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce C. GIAMEI ,  Christian JACOBI ,  Daniel V. ROSA ,  Anthony SAPORITO ,  Donald W. SCHMIDT ,  Chung-Lung K. SHUM

IPC: G06F12/0875 ,  G06F12/1027 ,  G06F12/0842 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/0815 ,  G06F12/084 ,  G06F9/30 ,  G06F9/38

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes identifying a storage operand request as restrained, where the identifying includes obtaining, by a processing unit, an access intent instruction indicating an access intent associated with an operand of a next sequential instruction. The access intent indicates usage of the storage operand request is restrained. Further, the method includes determining whether a storage operand request is to a common storage location shared by multiple processing units of a computing environment and is identified restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request.

公开(公告)号：US20180196754A1

公开(公告)日：2018-07-12

申请号：US15404254

申请日：2017-01-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce C. GIAMEI ,  Christian JACOBI ,  Daniel V. ROSA ,  Anthony SAPORITO ,  Donald W. SCHMIDT ,  Chung-Lung K. SHUM

IPC: G06F12/0875 ,  G06F12/1027 ,  G06F12/0842 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/0815 ,  G06F12/084

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：US20180349273A1

公开(公告)日：2018-12-06

申请号：US15609469

申请日：2017-05-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Giles R. FRAZIER ,  Michael K. GSCHWIND ,  Christian JACOBI ,  Younes MANTON ,  Anthony SAPORITO ,  Chung-Lung K. SHUM

IPC: G06F12/02 ,  G06F12/0802

CPC classification number: G06F12/0261 ,  G06F12/0802 ,  G06F2212/1044

Abstract: A garbage collection facility is provided for memory management within a computer. The facility implements, in part, grouping of infrequently accessed data units in a designated transient memory area, and includes designating an area of the memory as a transient memory area and an area as a conventional memory area, and counting, for each data unit in the transient or conventional memory areas a number of accesses to the data unit. The counting provides a respective access count for each data unit. For each data unit in the transient memory area or the conventional memory area, a determination is made whether the respective access count is below a transient threshold ascertained to separate frequently accessed data units and infrequently used data units. Data units with respective access counts below the transient threshold are grouped together as transient data units within the transient memory area.

公开(公告)号：US20180196751A1

公开(公告)日：2018-07-12

申请号：US15404247

申请日：2017-01-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce C. GIAMEI ,  Christian JACOBI ,  Daniel V. ROSA ,  Anthony SAPORITO ,  Donald W. SCHMIDT ,  Chung-Lung K. SHUM

IPC: G06F12/0808 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/0891

CPC classification number: G06F12/0808 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/0891 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/6042

Abstract: A computing environment facility is provided to extend a hold of a cache line in private (or local) cache exclusively after processing a storage operand request. The facility includes determining whether a storage operand request to a storage location shared by multiple processing units of the computing environment is designated hold. In addition, a determination is made whether a state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively. Based on determining that the storage operand request is designated hold, and that the state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively, continuing to hold the corresponding cache line in the private cache exclusively after completing processing of the storage operand request. The continuing to hold may include initiating a counter to facilitate the continuing hold for a desired, set interval.

公开(公告)号：US20180074826A1

公开(公告)日：2018-03-15

申请号：US15802725

申请日：2017-11-03

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Michael K. GSCHWIND ,  Christian JACOBI ,  Anthony SAPORITO ,  Chung-Lung K. SHUM

IPC: G06F9/38 ,  G06F12/0875

CPC classification number: G06F9/3802 ,  G06F9/30047 ,  G06F12/0862 ,  G06F12/0875 ,  G06F2212/1016 ,  G06F2212/452 ,  G06F2212/6022 ,  G06F2212/6028

Abstract: A method, system, and computer program product are provided for prioritizing prefetch instructions. The method includes a processor issuing a prefetch instruction and fetching elements from a cache that can include a memory or a higher level cache. The processor stores the elements in temporary storage and monitors for accesses by an instruction. The processor stores a record representing the prefetch instruction. The processor updates the record with an indicator and issues a new prefetch instruction by comparing the new prefetch instruction to the record, based on the new prefetch instruction matching the prefetch instruction, assigning the indicator to the new prefetch instruction as a priority value, based on the new prefetch instruction not matching the prefetch instruction, assigning a default value to the new prefetch instruction as the priority value, and determining whether to execute the new prefetch instruction, based on the priority value of the new prefetch instruction.