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公开(公告)号：US10546809B2
公开(公告)日：2020-01-28
申请号：US16150439
申请日：2018-10-03
发明人： Charles E. Cox , Harald Huels , Arvind Kumar , Xiao Hu Liu , Ahmet S. Ozcan , Winfried W. Wilcke
IPC分类号： H01L29/40 , H01L23/50 , H01L23/498 , H01L23/00 , H01L25/065 , H01L25/00 , H01L21/48
摘要： A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-silicon vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.
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公开(公告)号：US10147676B1
公开(公告)日：2018-12-04
申请号：US15595141
申请日：2017-05-15
发明人： Charles E. Cox , Harald Huels , Arvind Kumar , Xiao Hu Liu , Ahmet S. Ozcan , Winfried W. Wilcke
IPC分类号： H01L21/44 , H01L23/34 , H01L23/50 , H01L23/498 , H01L23/00 , H01L25/065 , H01L25/00 , H01L21/48
摘要： A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-hole vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.
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公开(公告)号：US10423877B2
公开(公告)日：2019-09-24
申请号：US15237459
申请日：2016-08-15
发明人： Charles E. Cox , Harald Huels , Arvind Kumar , Pritish Narayanan , Ahmet S. Ozcan , J. Campbell Scott , Winfried W. Wilcke
摘要： Three-dimensional (3D) neuromorphic computing systems are provided. A system includes a logic wafer having a plurality of processors. The system further includes a double-sided interposer bonded to the logic wafer and incorporating a signal port ring for sending and receiving signals. The system also includes a plurality of 3D memory modules bonded to the double-sided interposer. The double-sided interposer is a wafer scale or a panel scale providing communication between the plurality of processors and the plurality of 3D memory modules.
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公开(公告)号：US20190035722A1
公开(公告)日：2019-01-31
申请号：US16150439
申请日：2018-10-03
发明人： Charles E. Cox , Harald Huels , Arvind Kumar , Xiao Hu Liu , Ahmet S. Ozcan , Winfried W. Wilcke
IPC分类号： H01L23/50 , H01L21/48 , H01L23/498 , H01L25/00 , H01L25/065 , H01L23/00
摘要： A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-silicon vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.
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公开(公告)号：US20180331028A1
公开(公告)日：2018-11-15
申请号：US15595141
申请日：2017-05-15
发明人： Charles E. Cox , Harald Huels , Arvind Kumar , Xiao Hu Liu , Ahmet S. Ozcan , Winfried W. Wilcke
IPC分类号： H01L23/50 , H01L23/498 , H01L23/00 , H01L25/065 , H01L25/00 , H01L21/48
CPC分类号： H01L23/50 , H01L21/4853 , H01L21/486 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L24/16 , H01L25/0655 , H01L25/50 , H01L2224/16235
摘要： A method is provided to supply power to wafer-scale ICs. The method includes receiving a wafer containing ICs placed on the top of the wafer. The wafer has through-hole vias to provide power from the bottom to the ICs. The method also includes a printed circuit board, which has power rails in a pattern on the top of the printed circuit board, where the rails provide voltage and ground. The method continues with placing metal solder spheres between the bottom of the wafer and the top of the printed circuit board, where the spheres provide connections between the two, and where the spheres are free to move and operate as mechanical springs to resist clamping forces. The method also includes applying clamping pressure to the structure to establish connections by compressing the spheres, where no soldering is required.
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公开(公告)号：US20180046908A1
公开(公告)日：2018-02-15
申请号：US15237459
申请日：2016-08-15
发明人： Charles E. Cox , Harald Huels , Arvind Kumar , Pritish Narayanan , Ahmet S. Ozcan , J. Campbell Scott , Winfried W. Wilcke
IPC分类号： G06N3/063
摘要： Three-dimensional (3D) neuromorphic computing systems are provided. A system includes a logic wafer having a plurality of processors. The system further includes a double-sided interposer bonded to the logic wafer and incorporating a signal port ring for sending and receiving signals. The system also includes a plurality of 3D memory modules bonded to the double-sided interposer. The double-sided interposer is a wafer scale or a panel scale providing communication between the plurality of processors and the plurality of 3D memory modules.
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