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公开(公告)号：US20240028095A1
公开(公告)日：2024-01-25
申请号：US17813346
申请日：2022-07-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Tobias Webel , Alejandro Alberto Cook Lobo , Andrew A. Turner , CHRISTIAN JACOBI , Eberhard Engler , Edward C. McCain , Kevin P. Low , Phillip John Restle , Pradeep Bhadravati Parashurama , Alper Buyuktosunoglu , KARL EVAN SMOCK ANDERSON , Sean Michael Carey , KENNEDY CHERUIYOT , Daniel Kiss , Isidore G. Bendrihem , Eric Jason Fluhr , IAN KRISPIN CARMICHAEL , Gregory Scott Still
CPC classification number: G06F1/28 , G06F9/4893
Abstract: Embodiments include in response to monitoring a processor during operation, detecting a first number of throttling amounts in the processor, determining that the first number of throttling amounts fulfills a first condition regarding a throttling amounts threshold, and modifying a voltage level of the processor by a first amount. Embodiments include in response to modifying the voltage level of the processor by the first amount, detecting a second number of throttling amounts in the processor, determining that the second number of throttling amounts fulfills a second condition regarding the throttling amounts threshold, and modifying the voltage level of the processor by a second amount.
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公开(公告)号：US20180285147A1
公开(公告)日：2018-10-04
申请号：US15478379
申请日：2017-04-04
Applicant: International Business Machines Corporation
Inventor： Eberhard Engler , Christian Jacobi , Timothy J. Slegel , Scott B. Swaney
Abstract: An aspect includes performing, for each of a plurality of hardware threads executing on a plurality of cores in a (SMP) computer system, receiving a value of a timer corresponding to the hardware thread, the timer counting a number of clock cycles since a last reset of the timer. The value of the timer is compared to a threshold value for the hardware thread, where the threshold value specifies a number of clock cycles. Based on the value of the timer meeting the threshold value, a control signal is sent to cause all hardware threads currently executing on the core to halt execution and data describing a state of the core is logged. Each of the timers corresponding to each of the plurality of hardware threads are configured to be reset, paused, and restarted independently of each of the other timers.
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公开(公告)号：US11989071B2
公开(公告)日：2024-05-21
申请号：US17813346
申请日：2022-07-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Tobias Webel , Alejandro Alberto Cook Lobo , Andrew A. Turner , Christian Jacobi , Eberhard Engler , Edward C. McCain , Kevin P. Low , Phillip John Restle , Pradeep Bhadravati Parashurama , Alper Buyuktosunoglu , Karl Evan Smock Anderson , Sean Michael Carey , Kennedy Cheruiyot , Daniel Kiss , Isidore G. Bendrihem , Eric Jason Fluhr , Ian Krispin Carmichael , Gregory Scott Still
CPC classification number: G06F1/28 , G06F9/4893
Abstract: Embodiments include in response to monitoring a processor during operation, detecting a first number of throttling amounts in the processor, determining that the first number of throttling amounts fulfills a first condition regarding a throttling amounts threshold, and modifying a voltage level of the processor by a first amount. Embodiments include in response to modifying the voltage level of the processor by the first amount, detecting a second number of throttling amounts in the processor, determining that the second number of throttling amounts fulfills a second condition regarding the throttling amounts threshold, and modifying the voltage level of the processor by a second amount.
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公开(公告)号：US20220035399A1
公开(公告)日：2022-02-03
申请号：US17506235
申请日：2021-10-20
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Eberhard Engler , Dan F. Greiner , Michel H. T. Hack , Timothy J. Slegel , Joachim von Buttlar
Abstract: A clock comparator sign control is used in a compare operation. A clock comparator sign control that determines whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation is obtained. The clock comparator sign control is then used in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized.
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公开(公告)号：US10884845B2
公开(公告)日：2021-01-05
申请号：US16184017
申请日：2018-11-08
Applicant: International Business Machines Corporation
Inventor： Peter Sutton , David Lee , Eberhard Engler , Thomas Rozmus
IPC: G06F11/00 , G06F11/07 , G06F9/50 , G06F9/455 , G06F9/4401
Abstract: According to one or more embodiments of the present invention, a computer-implemented method includes detecting an abnormal event in operation of a first partition from a plurality of partitions of a computer server, the first partition being associated with a set of processors of the computer server and with a set of computing resources of the computer server. The method further includes in response, determining the set of processors associated with the first partition. The method further includes adjusting one or more settings of the set of processors to increase the set of computing resources associated with the first partition to complete the abnormal event.
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Patent Agency Ranking
公开(公告)号：US11934220B2
公开(公告)日：2024-03-19
申请号：US17506235
申请日：2021-10-20
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Eberhard Engler , Dan F. Greiner , Michel H. T. Hack , Timothy J. Slegel , Joachim von Buttlar
CPC classification number: G06F1/14 , G06F9/3001 , G06F9/4812 , G06F8/78
Abstract: A clock comparator sign control is used in a compare operation. A clock comparator sign control that determines whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation is obtained. The clock comparator sign control is then used in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized.
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公开(公告)号：US09720441B1
公开(公告)日：2017-08-01
申请号：US15282224
申请日：2016-09-30
Applicant: International Business Machines Corporation
Inventor： Eberhard Engler , Christian Jacobi , Martin Recktenwald , Timothy J. Slegel
IPC: G06F1/12 , G06F1/14 , G06F15/16 , G06F15/163 , G06F15/167
CPC classification number: G06F1/12 , G06F1/14 , G06F9/52 , G06F15/163 , G06F15/167
Abstract: A system and method for generating a timestamp without processor core execution stall are provided. For example, the method includes generating, using a first processor core, a timestamp. The method also includes preventing, using the first processor core, a second processor core from accessing the timestamp for a minimum time granularity interval. The time granularity interval provides a delay such that the timestamp generated by the first processor core is earlier in time than a second processor core timestamp.
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8.发明授权Generation and distribution of steered time interval pulse to a plurality of hardware components of the computing system 有权将转向时间间隔脉冲生成和分配到计算系统的多个硬件组件公开(公告)号：US09104364B2
公开(公告)日：2015-08-11
申请号：US13677495
申请日：2012-11-15
Applicant: International Business Machines Corporation
Inventor： Eberhard Engler , Guenter Gerwig , Willm Hinrichs , Barinjato Ramanandray
CPC classification number: G06F1/14 , G06F1/04 , G06F1/08 , G06F1/12 , G06F1/3203
Abstract: An indication of time that indicates at least one of the current day and the current time is received. It is determined that a raw interval pulse transmitted by a first oscillator should be adjusted based, at least partly, on the indication of time. In response to determining that the raw interval pulse should be adjusted, a steered time interval pulse is generated based, at least partly, on the raw time interval pulse and the indication of time. The steered time interval pulse is distributed to a plurality of hardware components.
Abstract translation: 接收到指示当前日期和当前时间中的至少一个的时间指示。 确定由第一振荡器发送的原始间隔脉冲应当至少部分地基于时间的指示进行调整。 响应于确定应该调整原始间隔脉冲，至少部分地基于原始时间间隔脉冲和时间指示来生成转向时间间隔脉冲。 转向时间间隔脉冲被分配到多个硬件组件。
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公开(公告)号：US20240028447A1
公开(公告)日：2024-01-25
申请号：US17813341
申请日：2022-07-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Alejandro Alberto Cook Lobo , Andrew A. Turner , CHRISTIAN JACOBI , Eberhard Engler , Edward C. McCain , Kevin P. Low , Phillip John Restle , Pradeep Bhadravati Parashurama , Tobias Webel , Alper Buyuktosunoglu , KARL EVAN SMOCK ANDERSON , Sean Michael Carey , KENNEDY CHERUIYOT , Daniel Kiss , Isidore G. Bendrihem , IAN KRISPIN CARMICHAEL
CPC classification number: G06F11/0793 , G06F1/305 , G06F11/0721 , G06F11/076
Abstract: Embodiments include in response to monitoring a processor during operation, detecting a first number of core recovery events in the processor, determining that the first number of core recovery events fulfills a first condition for the first core recovery events threshold, and modifying a value of at least one droop sensor parameter of the processor by a first amount. The at least one droop sensor parameters affects a sensitivity to a voltage droop. In response to modifying the value of the droop sensor parameter by the first amount, a second number of core recovery events is detected in the processor. It is determined that the second number of core recovery events fulfills a second condition for a second core recovery events threshold, and the value of the at least one droop sensor parameter is modified by a second amount.
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公开(公告)号：US11199870B2
公开(公告)日：2021-12-14
申请号：US16544063
申请日：2019-08-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Eberhard Engler , Dan F. Greiner , Michel H. T. Hack , Timothy J. Slegel , Joachim von Buttlar
Abstract: A clock comparator sign control is used in a compare operation. A clock comparator sign control that determines whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation is obtained. The clock comparator sign control is then used in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized.
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