公开(公告)号：US20130147530A1

公开(公告)日：2013-06-13

申请号：US13761358

申请日：2013-02-07

Applicant: International Business Machines Corporation

Inventor： Hanyi DING ,  Kai D. FENG ,  Zhenrong JIN ,  Francis F. SZENHER

IPC: H03L7/08

CPC classification number: H03L7/08 ,  H03L7/22

Abstract: A method includes phase-shifting an output signal of a phase lock loop (PLL) circuit by applying an injection current to an output of a charge pump of a the PLL circuit. A circuit includes: a first phase lock loop (PLL) circuit and a second PLL circuit referenced to a same clock; a phase detector circuit that detects a phase difference between an output signal of the first PLL circuit and an output signal of the second PLL circuit; and an adjustable current source that applies an injection current to at least one of the first PLL circuit and the second PLL circuit based on an output of the phase detector circuit.

Abstract translation: 一种方法包括通过向PLL电路的电荷泵的输出施加注入电流来相移锁相环（PLL）电路的输出信号。 电路包括：第一锁相环（PLL）电路和参考相同时钟的第二PLL电路; 相位检测器电路，检测第一PLL电路的输出信号和第二PLL电路的输出信号之间的相位差; 以及可调电流源，其基于相位检测器电路的输出将注入电流施加到第一PLL电路和第二PLL电路中的至少一个。

公开(公告)号：US20140237438A1

公开(公告)日：2014-08-21

申请号：US13768112

申请日：2013-02-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi DING ,  Kai D. FENG ,  Hailing WANG

IPC: G06F17/50

CPC classification number: G06F17/5036 ,  G06F2217/40

Abstract: A method of modeling an integrated circuit chip includes generating a model of a bond pad using a design tool running on a computer device. The method also includes connecting a first inductor, a first resistor, and a first set of parallel-resistor-inductor elements in series between a first node and a second node in the model. The method further includes connecting a second inductor, a second resistor, and a second set of parallel-resistor-inductor elements in series between the second node and a third node in the model. The first node corresponds to a first signal port of the bond pad. The second node corresponds to a second signal port of the bond pad.

Abstract translation: 对集成电路芯片进行建模的方法包括使用在计算机设备上运行的设计工具来生成焊盘的模型。 该方法还包括在模型中的第一节点和第二节点之间串联连接第一电感器，第一电阻器和第一组并联电阻器 - 电感器元件。 该方法还包括在模型中的第二节点和第三节点之间串联连接第二电感器，第二电阻器和第二组并联电阻器 - 电感器元件。 第一个节点对应于接合焊盘的第一个信号端口。 第二节点对应于接合焊盘的第二信号端口。

公开(公告)号：US20130134566A1

公开(公告)日：2013-05-30

申请号：US13748662

申请日：2013-01-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi DING ,  Kai D. FENG ,  Zhong-Xiang HE ,  Xuefeng LIU

IPC: H01L23/552

CPC classification number: H01L23/552 ,  H01L21/76 ,  H01L21/76264 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of the substrate and surrounding the region.