RECONFIGURABLE RAT RACE COUPLER
    1.
    发明申请
    RECONFIGURABLE RAT RACE COUPLER 有权
    可重构大鼠搭接器

    公开(公告)号:US20150341011A1

    公开(公告)日:2015-11-26

    申请号:US14285145

    申请日:2014-05-22

    CPC classification number: H03H7/18 H01P5/222

    Abstract: A reconfigurable rat race coupler and methods of designing and reconfiguring the rat race coupler are disclosed. The reconfigurable rat race coupler, includes a plurality of transmission lines. The plurality of transmission lines include: a first transmission line and a second transmission line each of which comprise a phase shifter; and a third transmission line and a fourth transmission line each of which comprise phase shifters. A signal input on port 1 is provided between the phase shifters on the third transmission line, which is split between ports 2 and 3, with port 4 being isolated and port 2 being between the phase shifters on the fourth transmission line.

    Abstract translation: 公开了一种可重构的大鼠赛跑耦合器以及设计和重新配置大鼠赛跑耦合器的方法。 可重构的大鼠赛跑耦合器包括多条传输线。 多个传输线包括:第一传输线和第二传输线,每个传输线包括移相器; 以及包括移相器的第三传输线和第四传输线。 端口1上的信号输入设置在端口2和3之间的第三传输线上的移相器之间,端口4被隔离,端口2位于第四传输线上的移相器之间。

    METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER
    2.
    发明申请
    METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER 有权
    通过威尔肯森森电力公司通过硅的方法,结构和设计结构

    公开(公告)号:US20130159957A1

    公开(公告)日:2013-06-20

    申请号:US13763136

    申请日:2013-02-08

    Abstract: A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.

    Abstract translation: 一种通过硅通孔威尔金森功率分配器的方法,结构和设计结构。 一种方法包括:在基板的第一侧上形成输入; 形成包括在所述基板中形成的第一穿通硅通孔的第一支脚,其中所述第一支路电连接所述输入端和第一输出端; 形成包括形成在所述基板中的第二通硅通孔的第二支脚,其中所述第二支脚电连接所述输入端和第二输出端,以及形成电连接在所述第一输出端和所述第二输出端之间的电阻器。

    INTEGRATED CIRCUIT PAD MODELING
    3.
    发明申请
    INTEGRATED CIRCUIT PAD MODELING 有权
    集成电路板建模

    公开(公告)号:US20140237438A1

    公开(公告)日:2014-08-21

    申请号:US13768112

    申请日:2013-02-15

    CPC classification number: G06F17/5036 G06F2217/40

    Abstract: A method of modeling an integrated circuit chip includes generating a model of a bond pad using a design tool running on a computer device. The method also includes connecting a first inductor, a first resistor, and a first set of parallel-resistor-inductor elements in series between a first node and a second node in the model. The method further includes connecting a second inductor, a second resistor, and a second set of parallel-resistor-inductor elements in series between the second node and a third node in the model. The first node corresponds to a first signal port of the bond pad. The second node corresponds to a second signal port of the bond pad.

    Abstract translation: 对集成电路芯片进行建模的方法包括使用在计算机设备上运行的设计工具来生成焊盘的模型。 该方法还包括在模型中的第一节点和第二节点之间串联连接第一电感器,第一电阻器和第一组并联电阻器 - 电感器元件。 该方法还包括在模型中的第二节点和第三节点之间串联连接第二电感器,第二电阻器和第二组并联电阻器 - 电感器元件。 第一个节点对应于接合焊盘的第一个信号端口。 第二节点对应于接合焊盘的第二信号端口。

    HIGH POWER RADIO FREQUENCY (RF) IN-LINE WAFER TESTING
    4.
    发明申请
    HIGH POWER RADIO FREQUENCY (RF) IN-LINE WAFER TESTING 有权
    高功率无线射频(RF)在线波形测试

    公开(公告)号:US20140184258A1

    公开(公告)日:2014-07-03

    申请号:US13733507

    申请日:2013-01-03

    CPC classification number: G01R31/26 G01R1/06766 G01R1/06772

    Abstract: Approaches for performing in line wafer testing are provided. An approach includes a method that includes generating a radio frequency (RF) test signal, and applying the RF test signal to a device under test (DUT) in a wafer using a buckling beam probe set with a predefined pitch. The method also includes detecting an output RF signal from the DUT in response to the applying the RF test signal to the DUT, and sensing at least one frequency component of the detected output RF signal.

    Abstract translation: 提供了执行在线晶片测试的方法。 一种方法包括一种方法,其包括产生射频(RF)测试信号,以及使用具有预定间距的屈曲束探针将RF测试信号施加到晶片中的待测器件(DUT)。 该方法还包括响应于将RF测试信号施加到DUT并且检测检测到的输出RF信号的至少一个频率分量来检测来自DUT的输出RF信号。

    RECONFIGURABLE BRANCH LINE COUPLER
    5.
    发明申请
    RECONFIGURABLE BRANCH LINE COUPLER 有权
    可重新分支线路耦合器

    公开(公告)号:US20150303548A1

    公开(公告)日:2015-10-22

    申请号:US14257464

    申请日:2014-04-21

    CPC classification number: H01P5/227 H01P5/04

    Abstract: A reconfigurable branch line coupler and methods of designing and reconfiguring the branch line coupler are disclosed. The reconfigurable branch line coupler includes a plurality of transmission lines, each of which comprises a phase shifter. The reconfigurable branch line coupler further includes an input port, which is split into two quadrature signals providing a second and third port between adjacent of the plurality of transmission lines, with a fourth port isolated from the input port at a center frequency.

    Abstract translation: 公开了一种可重新配置的分支线耦合器以及设计和重新配置支线耦合器的方法。 可重新配置的分支线耦合器包括多个传输线,每个传输线包括移相器。 可重构分支线路耦合器还包括输入端口,其被分成两个正交信号,提供在多个传输线路的相邻之间的第二和第三端口,以及以中心频率与输入端口隔离的第四端口。

    RECONFIGURABLE BANDSTOP FILTER
    7.
    发明申请
    RECONFIGURABLE BANDSTOP FILTER 有权
    可重新制造的带式过滤器

    公开(公告)号:US20150341009A1

    公开(公告)日:2015-11-26

    申请号:US14285067

    申请日:2014-05-22

    Abstract: A reconfigurable bandstop filter and methods of designing and reconfiguring the bandstop filter are disclosed. The reconfigurable bandstop filter includes a plurality of transmission lines each including a phase shifter. The reconfigurable bandstop filter further includes a signal input port having a phase shifter and a signal output port having a phase shifter. The signal input port and the signal output port is coupled to the plurality of transmission lines.

    Abstract translation: 公开了一种可重构带阻滤波器以及设计和重新配置带阻滤波器的方法。 可重构带阻滤波器包括多个传输线,每条传输线均包括移相器。 可重构带阻滤波器还包括具有移相器的信号输入端口和具有移相器的信号输出端口。 信号输入端口和信号输出端口耦合到多条传输线路。

    THROUGH PRINTED CIRCUIT BOARD (PCB) VIAS
    8.
    发明申请
    THROUGH PRINTED CIRCUIT BOARD (PCB) VIAS 有权
    通过印刷电路板(PCB)VIAS

    公开(公告)号:US20150208502A1

    公开(公告)日:2015-07-23

    申请号:US14161228

    申请日:2014-01-22

    Abstract: A broadband through printed circuit board (PCB) for millimeter wave application and methods of manufacture are disclosed. The structure includes a multiple layered body and an opening in the multiple layered body. The structure further includes at least one signal via extending through the opening. The structure further includes ground vias extending through the opening and on opposing sides of the at least one signal via. The structure further includes a ground plate above and below the opening and electrically connected to the ground vias at respective ends. The structure further includes a microstrip signal via above and below the opening and electrically connected to the at least one signal via.

    Abstract translation: 公开了一种用于毫米波应用的印刷电路板(PCB)和制造方法的宽带。 该结构包括多层体和多层体中的开口。 该结构还包括延伸穿过开口的至少一个信号。 所述结构还包括延伸穿过所述开口和所述至少一个信号通孔的相对侧的接地通孔。 该结构还包括在开口上方和下方的接地板,并在相应端部电连接到接地孔。 该结构还包括通过开口上方和下方并且电连接到至少一个信号通孔的微带信号。

    HIGH FREQUENCY QUADRATURE PLL CIRCUIT AND METHOD
    9.
    发明申请
    HIGH FREQUENCY QUADRATURE PLL CIRCUIT AND METHOD 有权
    高频四极PLL电路及方法

    公开(公告)号:US20130147530A1

    公开(公告)日:2013-06-13

    申请号:US13761358

    申请日:2013-02-07

    CPC classification number: H03L7/08 H03L7/22

    Abstract: A method includes phase-shifting an output signal of a phase lock loop (PLL) circuit by applying an injection current to an output of a charge pump of a the PLL circuit. A circuit includes: a first phase lock loop (PLL) circuit and a second PLL circuit referenced to a same clock; a phase detector circuit that detects a phase difference between an output signal of the first PLL circuit and an output signal of the second PLL circuit; and an adjustable current source that applies an injection current to at least one of the first PLL circuit and the second PLL circuit based on an output of the phase detector circuit.

    Abstract translation: 一种方法包括通过向PLL电路的电荷泵的输出施加注入电流来相移锁相环(PLL)电路的输出信号。 电路包括:第一锁相环(PLL)电路和参考相同时钟的第二PLL电路; 相位检测器电路,检测第一PLL电路的输出信号和第二PLL电路的输出信号之间的相位差; 以及可调电流源,其基于相位检测器电路的输出将注入电流施加到第一PLL电路和第二PLL电路中的至少一个。

    MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES
    10.
    发明申请
    MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES 有权
    微电子机械系统(MEMS)电容式OHMIC开关和设计结构

    公开(公告)号:US20140231236A1

    公开(公告)日:2014-08-21

    申请号:US14041983

    申请日:2013-09-30

    Abstract: A micro-electro-mechanical system (MEMS), methods of forming the MEMS and design structures are provided. The method includes forming a coplanar waveguide (CPW) comprising a signal electrode and a pair of electrodes on a substrate. The method includes forming a first sacrificial material over the CPW, and a wiring layer over the first sacrificial material and above the CPW. The method includes forming a second sacrificial material layer over the wiring layer, and forming insulator material about the first sacrificial material and the second sacrificial material. The method includes forming at least one vent hole in the insulator material to expose portions of the second sacrificial material, and removing the first and second sacrificial material through the vent hole to form a cavity structure about the wiring layer and which exposes the signal line and pair of electrodes below the wiring layer. The vent hole is sealed with sealing material.

    Abstract translation: 提供了微机电系统(MEMS),形成MEMS和设计结构的方法。 该方法包括在基板上形成包括信号电极和一对电极的共面波导(CPW)。 该方法包括在CPW上形成第一牺牲材料,以及在第一牺牲材料上方和CPW上方的布线层。 该方法包括在布线层上形成第二牺牲材料层,以及围绕第一牺牲材料和第二牺牲材料形成绝缘体材料。 所述方法包括在所述绝缘体材料中形成至少一个通气孔以暴露所述第二牺牲材料的部分,以及通过所述通气孔去除所述第一和第二牺牲材料以形成围绕所述布线层的空腔结构,并且暴露所述信号线和 一对电极在布线层下方。 通气孔用密封材料密封。

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