公开(公告)号：US20140113444A1

公开(公告)日：2014-04-24

申请号：US14145218

申请日：2013-12-31

Applicant: INTERSIL AMERICAS INC.

Inventor： John T. Gasner ,  Michael D. Church ,  Sameer D. Parab ,  Paul E. Bakeman, JR. ,  David A. Decrosta ,  Robert Lomenick ,  Chris A. McCarty

IPC: H01L21/768

CPC classification number: H01L21/76801 ,  H01L21/32051 ,  H01L21/76829 ,  H01L21/76841 ,  H01L21/7685 ,  H01L21/76886 ,  H01L23/528 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2224/45099

Abstract: A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Abstract translation: 半导体结构包括顶部金属层，形成在顶部金属层上的接合焊盘，形成在顶部金属层下面的导体以及将导体与顶部金属层分开的绝缘层。 与顶部金属层的剩余部分相比，顶部金属层包括相对刚性材料的子层。 相对硬的材料的子层被配置为在绝缘层上分布应力以减少绝缘层中的开裂。

公开(公告)号：US08946912B2

公开(公告)日：2015-02-03

申请号：US14145218

申请日：2013-12-31

Applicant: Intersil Americas Inc.

Inventor： John T. Gasner ,  Michael D. Church ,  Sameer D. Parab ,  Paul E. Bakeman, Jr. ,  David A. Decrosta ,  Robert Lomenick ,  Chris A. McCarty

IPC: H01L21/44 ,  H01L23/48 ,  H01L21/768 ,  H01L21/3205 ,  H01L23/528 ,  H01L23/532 ,  H01L23/00

CPC classification number: H01L21/76801 ,  H01L21/32051 ,  H01L21/76829 ,  H01L21/76841 ,  H01L21/7685 ,  H01L21/76886 ,  H01L23/528 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2224/45099

Abstract: A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Abstract translation: 半导体结构包括顶部金属层，形成在顶部金属层上的接合焊盘，形成在顶部金属层下面的导体以及将导体与顶部金属层分开的绝缘层。 与顶部金属层的剩余部分相比，顶部金属层包括相对刚性材料的子层。 相对硬的材料的子层被配置为在绝缘层上分布应力以减少绝缘层中的开裂。

公开(公告)号：US08652960B2

公开(公告)日：2014-02-18

申请号：US13717942

申请日：2012-12-18

Applicant: Intersil Americas Inc.

Inventor： John T. Gasner ,  Michael D. Church ,  Sameer D. Parab ,  Paul E. Bakeman, Jr. ,  David A. Decrosta ,  Robert Lomenick ,  Chris A. McCarty

IPC: H01L21/44

CPC classification number: H01L21/76801 ,  H01L21/32051 ,  H01L21/76829 ,  H01L21/76841 ,  H01L21/7685 ,  H01L21/76886 ,  H01L23/528 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2224/45099

Abstract: A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Abstract translation: 半导体结构包括顶部金属层，形成在顶部金属层上的接合焊盘，形成在顶部金属层下面的导体以及将导体与顶部金属层分开的绝缘层。 与顶部金属层的剩余部分相比，顶部金属层包括相对刚性材料的子层。 相对硬的材料的子层被配置为在绝缘层上分布应力以减少绝缘层中的开裂。

公开(公告)号：US20130130445A1

公开(公告)日：2013-05-23

申请号：US13717942

申请日：2012-12-18

Applicant: INTERSIL AMERICAS INC.

Inventor： John T. Gasner ,  Michael D. Church ,  Sameer D. Parab ,  Paul E. Bakeman, JR. ,  David A. Decrosta ,  Robert Lomenick ,  Chris A. McCarty

IPC: H01L23/00

CPC classification number: H01L21/76801 ,  H01L21/32051 ,  H01L21/76829 ,  H01L21/76841 ,  H01L21/7685 ,  H01L21/76886 ,  H01L23/528 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2224/45099

Abstract: A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Abstract translation: 半导体结构包括顶部金属层，形成在顶部金属层上的接合焊盘，形成在顶部金属层下面的导体以及将导体与顶部金属层分开的绝缘层。 与顶部金属层的剩余部分相比，顶部金属层包括相对刚性材料的子层。 相对硬的材料的子层被配置为在绝缘层上分布应力以减少绝缘层中的开裂。