公开(公告)号：US20030151877A1

公开(公告)日：2003-08-14

申请号：US10076716

申请日：2002-02-14

Applicant: INTERSIL AMERICAS INC.

Inventor： William R. Young ,  Gregg D. Croft

IPC: H02H003/22 ,  H01H001/00

CPC classification number: H01L27/0292 ,  H01L27/0251

Abstract: An electrostatic discharge protection circuit for an integrated circuit that reduces unwanted transient currents during normal operations. In one embodiment, the electrostatic discharge protection circuit includes one or more electrostatic bus lines, a plurality of signal bonding pads and charge pumps. The one or more electrostatic bus lines are used to direct electrostatic discharge around internal circuitry. The plurality of signal bonding pads are used to receive external voltage signals. Each signal bonding pad is coupled to an associated electrostatic bus line via an unidirectional conducting device. A charge pump is used on each electrostatic bus line to precharge its associated electrostatic bus line to an associated predetermined voltage level. The precharging of each electrostatic bus line to its predetermined voltage level reduces transient currents through the unidirectional conducting devices when external voltage signals having voltage levels beyond normal supply voltage ranges are applied to the signal bonding pads.

Abstract translation: 用于集成电路的静电放电保护电路，其在正常操作期间减少不期望的瞬态电流。 在一个实施例中，静电放电保护电路包括一个或多个静电总线，多个信号焊盘和电荷泵。 一个或多个静电总线用于引导围绕内部电路的静电放电。 多个信号接合焊盘用于接收外部电压信号。 每个信号焊盘通过单向导电装置耦合到相关联的静电总线。 在每个静电总线上使用电荷泵，以将其相关联的静电总线预充电至相关的预定电压电平。 当具有超过正常电源电压范围的电压电平的外部电压信号被施加到信号接合焊盘时，每个静电总线线路预充电到其预定的电压电平减小了通过单向导电器件的瞬态电流。

公开(公告)号：US20040038473A1

公开(公告)日：2004-02-26

申请号：US10645709

申请日：2003-08-21

Applicant: Intersil Americas Inc.

Inventor： Rex Everett Lowther ,  William R. Young

IPC: H01L021/8238

CPC classification number: H01L28/10 ,  H01F17/0013 ,  H01F27/367 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

Abstract translation: 本发明涉及具有接地屏蔽的对称感应装置的集成电路。 在一个实施例中，用于集成电路的对称感应装置包括基板，主金属层和屏蔽。 基板具有工作表面。 主金属层具有至少一对电流通路区域。 每个电流通路区域对形成为大致对称的大致对称的正交多边形形状，该对称平面垂直于衬底的工作表面。 屏蔽被图案化成通常对称平面对称的段。 当中间部分穿过对称平面时，屏蔽件的至少一些部分的中间部分大致垂直于对称平面形成。

公开(公告)号：US20030127686A1

公开(公告)日：2003-07-10

申请号：US10039200

申请日：2002-01-04

Applicant: INTERSIL AMERICAS INC.

Inventor： Rex Everett Lowther ,  William R. Young

IPC: H01L029/76

CPC classification number: H01L28/10 ,  H01F17/0013 ,  H01F27/367 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

公开(公告)号：US20030020535A1

公开(公告)日：2003-01-30

申请号：US09880726

申请日：2001-06-13

Applicant: Intersil Americas Inc.

Inventor： William R. Young ,  Gregg D. Croft

IPC: G05F001/10

CPC classification number: G05F3/267 ,  Y10S323/907

Abstract: A reference current/voltage gnereator is insensitive to variations in power supply voltage and temperature. The operational parameters of matched current mirror transistors of the generator are effectively equalized by an auxiliary bias amplifier, whose transistors are matched with and connected to the current mirror transistors of the generator in such a manner as to maintain the same electrical parameters in each of the current mirror legs of the current generator, irrespective of variations in supply voltage. Temperature insensitivity is achieved by making the output current mirror a current that is the sum of two currents whose current paths complementary temperature coefficients.

Abstract translation: 参考电流/电压发生器对电源电压和温度的变化不敏感。 发电机的匹配电流镜晶体管的工作参数通过辅助偏置放大器有效地相等，其辅助偏置放大器的晶体管与发生器的电流镜像晶体管相匹配并连接到发生器的电流镜像晶体管， 电流发生器的电流镜腿，与电源电压的变化无关。 通过使输出电流镜为电流为互补温度系数的两个电流的和的电流来实现温度不敏感。