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公开(公告)号:US11621388B2
公开(公告)日:2023-04-04
申请号:US17542110
申请日:2021-12-03
申请人: IQM Finland Oy
发明人: Tianyi Li , Wei Liu , Manjunath Ramachandrappa Venkatesh , Hasnain Ahmad , Kok Wai Chan , Kuan Yen Tan
摘要: The present invention relates to the manufacture of Josephson junctions. Such Josephson junctions may be suitable for use in qubits. High-quality, potentially monocrystalline, electrode and dielectric layers are formed using blanket deposition. Subsequently, the structure of one of more Josephson junctions is formed using multi-photon lithography to create openings in a resist followed by etching the electrode and dielectric layers.
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公开(公告)号:US20220181537A1
公开(公告)日:2022-06-09
申请号:US17406243
申请日:2021-08-19
申请人: IQM Finland Oy
发明人: Juha Hassel , Vasilii Sevriuk , Johannes Heinsoo , Kuan Yen Tan , Mikko Möttönen , Hao Hsu
摘要: It is an objective to provide an arrangement and a quantum computing system for qubit readout. According to an embodiment, an arrangement for qubit readout includes at least one qubit and a controllable energy relaxation structure comprising at least one junction. The controllable energy relaxation structure is coupled to the at least one qubit, and is configured to absorb, in response to a control signal, at least one photon from the at least one qubit via photon-assisted tunnelling of a charge through the at least one junction. The arrangement also includes a charge storage configured to store the tunnelled charge and a charge sensing structure coupled to the charge storage. The charge sensing structure is configured to provide a readout signal in response to detecting the tunnelled charge in the charge storage.
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公开(公告)号:US20220012617A1
公开(公告)日:2022-01-13
申请号:US17139715
申请日:2020-12-31
申请人: IQM Finland Oy
发明人: Juha Hassel , Wei Liu , Vasilii Sevriuk , Johannes Heinsoo , Mate Jenei , Manjunath Venkatesh , Tianyi Li , Kok Wai Chan , Kuan Yen Tan , Mikko Möttönen
IPC分类号: G06N10/00
摘要: A quantum computing circuit is disclosed herein. An example quantum computing circuit includes a first chip with at least one qubit thereon. The quantum computing circuit also includes a second chip with at least other quantum circuit elements other than qubits thereon. The first chip and the second chip are stacked together in a flip-chip configuration and attached to each other with bump bonding that includes bonding bumps.
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公开(公告)号:US11907805B2
公开(公告)日:2024-02-20
申请号:US17495085
申请日:2021-10-06
申请人: IQM Finland Oy
发明人: Caspar Ockeloen-Korppi , Tianyi Li , Wei Liu , Vasilii Sevriuk , Tiina Naaranoja , Mate Jenei , Jan Goetz , Kuan Yen Tan , Mikko Möttönen , Kok Wai Chan
CPC分类号: G06N10/00 , H10N60/0912 , H10N60/12 , H10N60/805 , H10N69/00
摘要: A three-dimensional superconducting qubit and a method for manufacturing the same are disclosed. In an example, a three-dimensional superconducting qubit comprises a structural base comprising one or more insulating materials, and superconductive patterns on surfaces of the structural base. The superconductive patterns form at least a capacitive part and an inductive part of the three-dimensional superconducting qubit. A first surface of the surfaces of the structural base defines a first plane and a second surface of the surfaces of the structural base defines a second plane, the second plane being oriented differently than the first plane. At least one superconductive pattern of the superconductive patterns extends from the first surface to the second surface.
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公开(公告)号:US20210406750A1
公开(公告)日:2021-12-30
申请号:US17087901
申请日:2020-11-03
申请人: IQM Finland Oy
发明人: Tianyi Li , Kok Wai Chan , Kuan Yen Tan , Jan Goetz , Mikko Möttönen
摘要: A method, system, and arrangement for resetting qubits are disclosed. An example system includes one or more quantum circuit refrigerators for resetting qubits. Each of the quantum circuit refrigerators includes a tunneling junction and a control input for receiving a control signal. Photon-assisted single-electron tunneling takes place across the respective tunneling junction in response to a control signal. Capacitive or inductive coupling elements between the qubits and the quantum circuit refrigerators couple each qubit to the quantum circuit refrigerator(s). The qubits, quantum circuit refrigerators, and coupling elements are located in a cryogenically cooled environment. A common control signal line to the control inputs crosses into the cryogenically cooled environment from a room temperature environment.
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公开(公告)号:US20200272925A1
公开(公告)日:2020-08-27
申请号:US16066207
申请日:2016-12-27
申请人: IQM Finland Oy
发明人: Mikko MÖTTÖNEN , Kuan Yen Tan , Matti Partanen
IPC分类号: G06N10/00 , H01L23/373 , H01L39/22 , H01L27/18
摘要: A circuit assembly for cooling a quantum electrical device, use of said circuit assembly, a system and a method for cooling a quantum electric device are provided. The circuit assembly comprises a quantum electric device to be cooled, at least one normal-metal-insulator-superconductor (NIS) tunnel junction electrically connected to the quantum electric device and at least one superconductive lead for supplying a drive voltage VQCR for said at least one NIS tunnel junction. The quantum electric device is cooled when the voltage VQCR is supplied to at least one NIS tunnel junction, said voltage VQCR being equal to or below the voltage NΔ/e, where N=1 or N=2, N is the number of NIS tunnel junctions electrically coupled in series with the means for generating the voltage, Δ is the energy gap in the superconductor density of states, and e is the elementary charge.
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公开(公告)号:US20240071944A1
公开(公告)日:2024-02-29
申请号:US18503673
申请日:2023-11-07
申请人: IQM FINLAND OY
发明人: Máté JENEI , Kok Wai Chan , Kuan Yen Tan
IPC分类号: H01L23/544 , H01L21/768 , H01L23/00 , H01L23/48
CPC分类号: H01L23/544 , H01L21/76898 , H01L23/481 , H01L24/16 , H01L24/81 , H01L2223/54426 , H01L2224/16145 , H01L2224/8113
摘要: The invention relates to the field of chip fabrication, in particular to the fabrication of superconducting integrated circuits for use in quantum computers. Raised and recessed alignment structures are provided on the surfaces of two substrate such that the raised and recessed alignment structure extends within the recessed alignment structure to a maximum depth determined by the geometry of the alignment structures. The alignment structures act as a hard stop for positioning and aligning the substrates for flip chip bonding.
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公开(公告)号:US20220181538A1
公开(公告)日:2022-06-09
申请号:US17542110
申请日:2021-12-03
申请人: IQM Finland Oy
发明人: Tianyi Li , Wei Liu , Manjunath Ramachandrappa Venkatesh , Hasnain Ahmad , Kok Wai Chan , Kuan Yen Tan
摘要: The present invention relates to the manufacture of Josephson junctions. Such Josephson junctions may be suitable for use in qubits. High-quality, potentially monocrystalline, electrode and dielectric layers are formed using blanket deposition. Subsequently, the structure of one of more Josephson junctions is formed using multi-photon lithography to create openings in a resist followed by etching the electrode and dielectric layers.
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公开(公告)号:US12074114B2
公开(公告)日:2024-08-27
申请号:US18503673
申请日:2023-11-07
申请人: IQM FINLAND OY
发明人: Máté Jenei , Kok Wai Chan , Kuan Yen Tan
IPC分类号: H01L23/544 , H01L21/768 , H01L23/00 , H01L23/48 , H01L25/00
CPC分类号: H01L23/544 , H01L21/76898 , H01L23/481 , H01L24/16 , H01L24/81 , H01L2223/54426 , H01L2224/16145 , H01L2224/8113
摘要: The invention relates to the field of chip fabrication, in particular to the fabrication of superconducting integrated circuits for use in quantum computers. Raised and recessed alignment structures are provided on the surfaces of two substrate such that the raised and recessed alignment structure extends within the recessed alignment structure to a maximum depth determined by the geometry of the alignment structures. The alignment structures act as a hard stop for positioning and aligning the substrates for flip chip bonding.
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公开(公告)号:US11985908B2
公开(公告)日:2024-05-14
申请号:US17524492
申请日:2021-11-11
申请人: IQM Finland Oy
发明人: Mikko Möttönen , Kuan Yen Tan , Matti Partanen
IPC分类号: H01L39/22 , H01L23/373 , H10N60/10 , H10N60/12 , H10N69/00
CPC分类号: H10N60/11 , H01L23/3735 , H10N60/12 , H10N69/00
摘要: A circuit assembly for cooling a quantum electrical device, use of said circuit assembly, a system and a method for cooling a quantum electric device are provided. The circuit assembly comprises a quantum electric device to be cooled, at least one normal-metal-insulator-superconductor (NIS) tunnel junction electrically connected to the quantum electric device and at least one superconductive lead for supplying a drive voltage VQCR for said at least one NIS tunnel junction. The quantum electric device is cooled when the voltage VQCR is supplied to at least one NIS tunnel junction, said voltage VQCR being equal to or below the voltage NΔ/e, where N=1 or N=2, N is the number of NIS tunnel junctions electrically coupled in series with the means for generating the voltage, Δ is the energy gap in the superconductor density of states, and e is the elementary charge.
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