公开(公告)号：US20060222833A1

公开(公告)日：2006-10-05

申请号：US11327111

申请日：2006-01-06

申请人： Il Maeng ,  Myeong Hong ,  Choon Lee ,  Jeong Kwak ,  Jae Cho ,  Seung Ra

发明人： Il Maeng ,  Myeong Hong ,  Choon Lee ,  Jeong Kwak ,  Jae Cho ,  Seung Ra

IPC分类号： B05D5/12 ,  B32B7/00

CPC分类号： H05K3/107 ,  H05K3/0014 ,  H05K3/005 ,  H05K2201/0209 ,  H05K2203/0108 ,  Y10T428/24917

摘要： The present invention relates to an imprinting mold for a printed circuit board, having excellent durability, and a method of manufacturing a printed circuit board using the same. Specifically, this invention provides an imprinting mold for a printed circuit board, having excellent durability, in which the mold having a surface structure corresponding to a plurality of via holes and a pattern to be formed is prepared by incorporating 30-80 parts by weight of a filler, having an average particle size of 0.1-5.0 μm, into 100 parts by weight of a heat or UV curing prepolymer. In addition, a method of manufacturing a printed circuit board using the imprinting mold is provided.

摘要翻译： 本发明涉及具有优异的耐久性的用于印刷电路板的印模，以及使用其的印刷电路板的制造方法。 具体而言，本发明提供一种印刷电路板的耐压性优异的耐压性，其中具有与多个通孔相对应的表面结构的模具和待形成的图案通过将30-80重量份的 将平均粒度为0.1-5.0μm的填料加入到100重量份的热固化或UV固化预聚物中。 此外，提供了使用压印模具制造印刷电路板的方法。

公开(公告)号：US20070020397A1

公开(公告)日：2007-01-25

申请号：US11435429

申请日：2006-05-16

申请人： Jae Cho ,  Myeong Hong ,  Seung Ra ,  Il Maeng ,  Jeong Kwak ,  Choon Lee ,  Sang Lee

发明人： Jae Cho ,  Myeong Hong ,  Seung Ra ,  Il Maeng ,  Jeong Kwak ,  Choon Lee ,  Sang Lee

IPC分类号： B05D3/12 ,  C25D5/02

CPC分类号： H05K3/107 ,  H05K3/045 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0723

摘要： Disclosed herein is a method of fabricating a printed circuit board using an imprinting process, including forming a plating layer on an insulating layer having a plurality of recessed patterns formed through an imprinting process, and etching and polishing the portion of the plating layer using an etchant, resulting in a low polishing process cost and eliminating the need for an additional polishing process, because deterioration of the surface of the insulting layer is prevented.

摘要翻译： 本文公开了一种使用压印工艺制造印刷电路板的方法，包括在具有通过压印工艺形成的多个凹陷图案的绝缘层上形成镀层，并且使用蚀刻剂蚀刻和抛光该镀层的该部分 导致抛光工艺成本低，并且不需要额外的抛光工艺，因为防止了绝缘层表面的劣化。

公开(公告)号：US20060226566A1

公开(公告)日：2006-10-12

申请号：US11326778

申请日：2006-01-05

申请人： Jeong Kwak ,  Il Maeng ,  Seung Ra

发明人： Jeong Kwak ,  Il Maeng ,  Seung Ra

IPC分类号： B29C59/02

CPC分类号： B29C59/02 ,  B29C2043/463 ,  H05K3/0014 ,  H05K3/107 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0143

摘要： The present invention relates to an imprinting apparatus, system and method. Specifically, the present invention relates to an imprinting apparatus, system and method, which can be applied to a large substrate, in which a substrate is aligned, imprinted through sequential pressurization by the imprinting apparatus to form a circuit pattern on the substrate and easily released from the imprinting apparatus.

摘要翻译： 本发明涉及压印装置，系统和方法。 具体地说，本发明涉及一种压印装置，系统和方法，其可以应用于通过压印装置的顺序加压而印刷基板的大型基板，以在基板上形成电路图案并且容易地释放 来自压印设备。