公开(公告)号：US10017133B2

公开(公告)日：2018-07-10

申请号：US15355149

申请日：2016-11-18

申请人： YAZAKI CORPORATION

发明人： Mitsunori Tsunoda ,  Gaku Ito ,  Tomoaki Sasaki ,  Shuji Kimura ,  Taku Furuta ,  Shoichi Nomura

IPC分类号： B60R16/02 ,  H05K3/26 ,  H05K1/02 ,  H05K1/18 ,  H05K3/12 ,  H05K3/04 ,  H05K3/24

CPC分类号： B60R16/02 ,  B60R16/0215 ,  H05K1/0265 ,  H05K1/0284 ,  H05K1/181 ,  H05K3/043 ,  H05K3/045 ,  H05K3/125 ,  H05K3/247 ,  H05K3/26 ,  H05K2201/0338 ,  H05K2201/0352 ,  H05K2201/0391 ,  H05K2201/09036 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10053 ,  H05K2201/10272 ,  H05K2203/025 ,  H05K2203/0353 ,  H05K2203/0545

摘要： An instrument panel as a vehicular panel includes a panel body on a surface side of which key tops are installed, a printed wiring section arranged on the surface side of the panel body, and an insulation outer layer arranged on the surface side of the panel body so as to cover the printed wiring section.

公开(公告)号：US09646854B2

公开(公告)日：2017-05-09

申请号：US14229777

申请日：2014-03-28

申请人： Intel Corporation

发明人： Yonggang Yong Li ,  Aritra Dhar ,  Dilan Seneviratne ,  Jon M. Williams

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L21/48 ,  H05K3/10 ,  H05K3/18 ,  C23C18/16 ,  C23C18/20 ,  C23C18/30 ,  H01L23/498 ,  H05K3/00 ,  H05K3/04 ,  C23C18/38

CPC分类号： H01L21/4857 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/2086 ,  C23C18/30 ,  C23C18/38 ,  H01L21/288 ,  H01L21/486 ,  H01L21/4864 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K3/0032 ,  H05K3/045 ,  H05K3/107 ,  H05K3/185 ,  H05K2201/0236 ,  H05K2203/072 ,  H05K2203/107

摘要： Embodiments describe the selective electroless plating of dielectric layers. According to an embodiment, a dielectric layer is patterned to form one or more patterned surfaces. A seed layer is then selectively formed along the patterned surfaces of the dielectric layer. An electroless plating process is used to deposit metal only on the patterned surfaces of the dielectric layer. According to an embodiment, the dielectric layer is doped with an activator precursor. Laser assisted local activation is performed on the patterned surfaces of the dielectric layer in order to selectively form a seed layer only on the patterned surfaces of the dielectric layer by reducing the activator precursor to an oxidation state of zero. According to an additional embodiment, a seed layer is selectively formed on the patterned surfaces of the dielectric layer with a colloidal or ionic seeding solution.

公开(公告)号：US09578742B1

公开(公告)日：2017-02-21

申请号：US14821819

申请日：2015-08-10

申请人： Unimicron Technology Corp.

发明人： Shih-Liang Cheng ,  Dyi-Chung Hu ,  Yu-Hua Chen

IPC分类号： H05K1/11 ,  H05K3/00 ,  H05K1/02 ,  H05K3/40 ,  H05K1/09 ,  H05K1/18

CPC分类号： H05K1/11 ,  H05K1/0298 ,  H05K1/182 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/007 ,  H05K3/0097 ,  H05K3/045 ,  H05K3/107 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0195 ,  H05K2203/025 ,  H05K2203/107 ,  H05K2203/1476

摘要： A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.

摘要翻译： 提供一种制造电路板结构的方法。 首先，在载体上形成第一电路层。 然后，在载体和第一电路层上形成第一电介质层。 此后，在第一电介质层中形成至少一个第一孔以暴露第一电路层的一部分。 然后，在第一电介质层和第一电路层上形成第二电介质层。 此后，在第二电介质层中形成至少一个沟槽和至少一个第二孔，其中沟槽露出第一电介质层的一部分，并且第二孔露出第一电路层的部分。 第二孔设置在第一孔中。 然后，形成金属层以填充沟槽和第二孔。

公开(公告)号：US09510464B2

公开(公告)日：2016-11-29

申请号：US13590815

申请日：2012-08-21

申请人： Tzyy-Jang Tseng ,  Shu-Sheng Chiang ,  Tsung-Yuan Chen

发明人： Tzyy-Jang Tseng ,  Shu-Sheng Chiang ,  Tsung-Yuan Chen

IPC分类号： H05K3/46 ,  H05K3/04 ,  H05K3/10 ,  C23C18/16 ,  H05K1/02 ,  H05K3/00

CPC分类号： H05K3/465 ,  C23C18/1612 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1689 ,  H05K1/0265 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/045 ,  H05K3/107 ,  H05K2201/0391 ,  H05K2201/09509 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A manufacturing method of a circuit board is provided. A circuit substrate having a first surface and at least a first circuit is provided. A dielectric layer having a second surface and covering the first surface and the first circuit is formed on the circuit substrate. The dielectric layer is irradiated by a laser beam to form a first intaglio pattern, a second intaglio pattern and at least a blind via. A first conductive layer is formed in the first intaglio pattern, the second intaglio pattern and the blind via. A barrier layer and a second conductive layer are formed in the second intaglio pattern and the blind via. Parts of the second conductive layer, parts of the barrier layer and parts of the first conductive layer are removed until the second surface of the dielectric layer is exposed, so as to form a patterned circuit structure.

摘要翻译： 提供电路板的制造方法。 提供具有第一表面和至少第一电路的电路基板。 具有第二表面并覆盖第一表面的电介质层和第一电路形成在电路基板上。 电介质层被激光束照射以形成第一凹版图案，第二凹版图案和至少一个盲孔。 在第一凹版图案，第二凹版图案和盲孔中形成第一导电层。 在第二凹版图案和盲孔中形成阻挡层和第二导电层。 去除第二导电层的一部分，阻挡层的一部分和第一导电层的部分直到电介质层的第二表面露出，以形成图案化的电路结构。

公开(公告)号：US20160286645A1

公开(公告)日：2016-09-29

申请号：US15177295

申请日：2016-06-08

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chih-Cheng LEE

IPC分类号： H05K1/11 ,  H05K3/00 ,  H05K1/02 ,  H05K3/04 ,  H05K3/06 ,  H05K3/46 ,  H05K3/10 ,  H05K3/40

CPC分类号： H05K1/115 ,  H05K1/0298 ,  H05K3/0023 ,  H05K3/04 ,  H05K3/045 ,  H05K3/06 ,  H05K3/10 ,  H05K3/108 ,  H05K3/4038 ,  H05K3/4644 ,  H05K3/465 ,  H05K2201/0352 ,  H05K2203/025 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： A method for manufacturing a substrate structure is provided. The method includes the following steps. A substrate is provided. The substrate has a patterned first metal layer, a pattern second metal layer and a through hole. After that, a first dielectric layer and a second dielectric layer are formed at a first surface and a second surface of the substrate, respectively. The second surface is opposite to the first surface. Then, the first dielectric layer and the second dielectric layer are patterned. After that, a first trace layer is formed at a surface of the patterned first dielectric layer. The first trace layer is embedded into the patterned first dielectric layer and is coplanar with the first dielectric layer. Then, a second trace layer is formed on a surface of the second dielectric layer.

公开(公告)号：US20160086709A1

公开(公告)日：2016-03-24

申请号：US14963579

申请日：2015-12-09

申请人： Radial Electronics, Inc.

发明人： James E. Quilici

IPC分类号： H01F17/00 ,  H01F17/06

CPC分类号： H01F17/0033 ,  H01F17/062 ,  H01F27/027 ,  H01F41/02 ,  H01F41/0206 ,  H01F41/041 ,  H01F41/042 ,  H01F41/064 ,  H01F2027/2814 ,  H05K1/0284 ,  H05K1/165 ,  H05K3/0014 ,  H05K3/045 ,  H05K3/4611 ,  H05K2201/086 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/2036 ,  Y10T29/4902 ,  Y10T29/49073 ,  Y10T29/49075 ,  Y10T156/10

摘要： Disclosed are apparatus and methods for a magnetic component. In accordance with an embodiment, a magnetic component comprises a base substrate defining a winding cup having a shape of a closed groove surrounding a hub. The winding cup defines a core space operable to receive a core therein. A first conductive pattern is disposed on at least a portion of the base substrate including the winding cup. A second substrate defines a second conductive pattern. The second substrate is coupled to the first base surface with the first conductive pattern in operable alignment with the second conductive pattern. The first and second conductive patterns are coupled in electrical communication so as to define one or more winding-type electric circuits surrounding the core space so as to induce a magnetic flux within the core space when the one or more electric circuits are energized by a voltage source.

摘要翻译： 公开了用于磁性部件的装置和方法。 根据一个实施例，磁性部件包括限定具有围绕轮毂的封闭凹槽的形状的绕线杯的基底基板。 绕组杯限定了可操作以在其中容纳芯的芯空间。 第一导电图案设置在包括卷绕杯的基底基板的至少一部分上。 第二衬底限定第二导电图案。 第二衬底被耦合到第一基底表面，其中第一导电图案与第二导电图案可操作地对准。 第一和第二导电图案电连接地耦合，以便限定一个或多个围绕磁芯空间的绕组电路，以便当一个或多个电路通过电压激励时，在磁芯空间内引起磁通量 资源。

公开(公告)号：US20160050761A1

公开(公告)日：2016-02-18

申请号：US14535301

申请日：2014-11-06

申请人： Tzyy-Jang Tseng ,  Chien-Nan Wu

发明人： Tzyy-Jang Tseng ,  Chien-Nan Wu

IPC分类号： H05K3/00 ,  H05K1/02 ,  H05K3/04

CPC分类号： H05K3/0029 ,  H05K1/0209 ,  H05K3/045 ,  H05K3/28 ,  H05K2201/0376 ,  H05K2201/098 ,  H05K2203/025 ,  H05K2203/072

摘要： A method of manufacturing a substrate structure is provided. An insulation substrate having an upper surface is provided. A portion of the upper surface of the insulation substrate is irradiated by a first laser beam so as to form a first intaglio pattern. The first laser beam is IR laser beam or fiber laser beam. The first intaglio pattern has a modification surface. A first metal layer is formed on the upper surface of the insulation substrate, and covers the upper surface of the insulation layer and the modification surface of the first intaglio pattern, and fills up the first intaglio pattern. A grinding process is performed on the first metal layer so as to expose the upper surface of the insulation substrate and define a first patterned circuit layer. A first upper surface of the first patterned circuit layer is aligned with the upper surface of the insulation substrate.

摘要翻译： 提供一种制造衬底结构的方法。 提供具有上表面的绝缘基板。 绝缘基板的上表面的一部分被第一激光束照射，以形成第一凹版图案。 第一激光束是IR激光束或光纤激光束。 第一个凹版图案具有修饰面。 第一金属层形成在绝缘基板的上表面上，并且覆盖绝缘层的上表面和第一凹版图案的修改表面，并填满第一凹版图案。 在第一金属层上进行研磨处理，以露出绝缘基板的上表面并限定第一图案化电路层。 第一图案化电路层的第一上表面与绝缘基板的上表面对准。

公开(公告)号：US20150279731A1

公开(公告)日：2015-10-01

申请号：US14229777

申请日：2014-03-28

申请人： Yonggang Yong LI ,  Aritra DHAR ,  Dilan SENEVIRATNE ,  Jon M. WILLIAMS

发明人： Yonggang Yong LI ,  Aritra DHAR ,  Dilan SENEVIRATNE ,  Jon M. WILLIAMS

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L21/4857 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/2086 ,  C23C18/30 ,  C23C18/38 ,  H01L21/288 ,  H01L21/486 ,  H01L21/4864 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K3/0032 ,  H05K3/045 ,  H05K3/107 ,  H05K3/185 ,  H05K2201/0236 ,  H05K2203/072 ,  H05K2203/107

摘要： Embodiments describe the selective electroless plating of dielectric layers. According to an embodiment, a dielectric layer is patterned to form one or more patterned surfaces. A seed layer is then selectively formed along the patterned surfaces of the dielectric layer. An electroless plating process is used to deposit metal only on the patterned surfaces of the dielectric layer. According to an embodiment, the dielectric layer is doped with an activator precursor. Laser assisted local activation is performed on the patterned surfaces of the dielectric layer in order to selectively form a seed layer only on the patterned surfaces of the dielectric layer by reducing the activator precursor to an oxidation state of zero. According to an additional embodiment, a seed layer is selectively formed on the patterned surfaces of the dielectric layer with a colloidal or ionic seeding solution.

摘要翻译： 实施例描述了介电层的选择性无电镀。 根据实施例，对电介质层进行图案化以形成一个或多个图案化表面。 然后沿着电介质层的图案化表面选择性地形成晶种层。 使用化学镀方法仅将金属沉积在电介质层的图案化表面上。 根据实施例，电介质层掺杂有活化剂前体。 在电介质层的图案化表面上进行激光辅助局部激活，以便通过将活化剂前体还原为零的氧化态来选择性地在电介质层的图案化表面上形成晶种层。 根据另外的实施方案，在电介质层的图案化表面上用胶体或离子种子溶液选择性地形成晶种层。

公开(公告)号：US20140295065A1

公开(公告)日：2014-10-02

申请号：US14194835

申请日：2014-03-03

申请人： FUJITSU LIMITED

发明人： Tomomi Sato ,  Tsutomu KOMURO

IPC分类号： H05K3/00 ,  B29C59/02 ,  H05K3/10

CPC分类号： H05K3/0014 ,  H05K3/045 ,  H05K3/107 ,  H05K2201/09881 ,  H05K2203/0108 ,  H05K2203/025 ,  H05K2203/054 ,  H05K2203/0723

摘要： A resin protrusion forming method includes: forming on a substrate a thermal curing resin layer that is in an uncured state; forming a protrusion by pressing a forming mold against the thermal curing resin layer; forming a retaining member that retains a side face of the protrusion; and heating the substrate on which the protrusion and the retaining member have been formed.

摘要翻译： 树脂突起形成方法包括：在基板上形成处于未固化状态的热固化树脂层; 通过将成形模压在所述热固化树脂层上来形成突起; 形成保持突起的侧面的保持构件; 并且加热其上形成有突起和保持构件的基板。

公开(公告)号：US08828247B2

公开(公告)日：2014-09-09

申请号：US13589635

申请日：2012-08-20

申请人： Soon Chul Kwon ,  Sang Min Lee

发明人： Soon Chul Kwon ,  Sang Min Lee

IPC分类号： H01B13/00

CPC分类号： H05K3/045 ,  H05K3/4038 ,  H05K2203/025 ,  H05K2203/0323 ,  H05K2203/0369 ,  H05K2203/1476

摘要： Provided is a method of manufacturing a circuit which includes: (a) providing a substrate made of a conductive material; (b) etching a first surface of the substrate excluding a region in which at least one via is to be formed; (c) etching a region of the etched first surface of the substrate in which an insulated portion of a first circuit is to be formed; (d) stacking a first insulation layer in spaces formed by the etching performed in operations (b) and (c); and (e) grinding a second surface of the substrate to expose the first insulation layer outward along with the first circuit, thereby forming a circuit board.

摘要翻译： 提供一种制造电路的方法，包括：（a）提供由导电材料制成的基板; （b）蚀刻除了要形成至少一个通孔的区域之外的衬底的第一表面; （c）蚀刻要在其中形成第一电路的绝缘部分的所述衬底的蚀刻的第一表面的区域; （d）在操作（b）和（c）中执行的蚀刻形成的空间中堆叠第一绝缘层; 以及（e）研磨所述基板的第二表面以将所述第一绝缘层与所述第一电路一起向外露出，由此形成电路板。