-
公开(公告)号:US20170309328A1
公开(公告)日:2017-10-26
申请号:US15492065
申请日:2017-04-20
发明人: Seong-Ook JUNG , Tae Woo OH , Hanwool JEONG
IPC分类号: G11C11/419
CPC分类号: G11C11/419 , G11C7/12
摘要: Disclosed is a local bit line-sharing memory device, including a plurality of memory cells that share a local bit line pair; a pre-charging unit that is connected to a write bit line pair and pre-charges the local bit line pair; and a data reading unit that reads data when bit line voltage pre-charged in a memory cell selected from the memory cells is discharged.
-
2.
公开(公告)号:US20160181993A1
公开(公告)日:2016-06-23
申请号:US14974374
申请日:2015-12-18
发明人: Seongook JUNG , Hanwool JEONG , Young Hwi YANG , Kyoman KANG
CPC分类号: G11C7/12 , G11C7/062 , G11C7/065 , G11C7/067 , G11C7/1048 , G11C11/4091 , G11C11/419
摘要: The present disclosure herein relates to a sense amplifier and a semiconductor memory device employing the same. The sense amplifier includes an inverter including a pull-up transistor and a pull-down transistor, and a switching unit configured to change a connection relationship between the pull-up transistor and the pull-down transistor according to whether an input terminal of the inverter is precharged or a signal applied to the input terminal is sensed.
摘要翻译: 本发明涉及一种读出放大器和采用该放大器的半导体存储器件。 读出放大器包括具有上拉晶体管和下拉晶体管的反相器,以及开关单元,被配置为根据反相器的输入端子来改变上拉晶体管和下拉晶体管之间的连接关系 被预充电或者感测到施加到输入端子的信号。
-
公开(公告)号:US20160141023A1
公开(公告)日:2016-05-19
申请号:US14942263
申请日:2015-11-16
发明人: Seongook JUNG , Kyoman KANG , Hanwool JEONG , Young Hwi YANG , Juhyun PARK
IPC分类号: G11C11/419
CPC分类号: G11C11/419 , G11C7/18
摘要: Disclosed is a memory device. The memory device includes a bit-cell comprising a cross-coupled inverter and pass gate transistor connected to data storage node of the cross-coupled inverter, a read buffer transistor having a drain terminal connected to a bit line for read operation and a gate terminal connected to the pass gate transistor, a write operation transistor connected between the pass gate transistor and a bit line for write operation, and a drive transistor unit which is connected to a local line between the pass gate transistors and the write operation transistor and which provide a voltage to a gate terminal of the read buffer transistor based on a data value stored at the bit-cell.
摘要翻译: 公开了一种存储装置。 存储器件包括一个位单元,它包括一个与交叉耦合的反相器的数据存储节点连接的交叉耦合的反相器和通过栅极晶体管,一个读取缓冲晶体管,其具有连接到位线用于读取操作的漏极端子和一个栅极端子 连接到通栅晶体管,连接在通栅晶体管和用于写操作的位线之间的写操作晶体管,以及驱动晶体管单元,其连接到通栅晶体管和写操作晶体管之间的局部线,并且提供 基于存储在位单元的数据值,读取缓冲晶体管的栅极端子的电压。
-
-