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公开(公告)号:US20140132433A1
公开(公告)日:2014-05-15
申请号:US14078499
申请日:2013-11-12
Applicant: Infineon Technologies AG
Inventor: Dietmar STRAEUSSNIGG , Andreas WIESBAUER
IPC: H03M1/18
CPC classification number: H03M1/0626 , H03M1/0863 , H03M1/186
Abstract: An analog-to-digital converter arrangement may include an analog amplifier with variable gain; an analog-to-digital converter; a digital reconstruction element including elements to reduce an influence of transients during a change of the variable gain of the analog amplifier.
Abstract translation: 模数转换器装置可以包括具有可变增益的模拟放大器; 一个模拟 - 数字转换器; 数字重建元件包括在模拟放大器的可变增益的变化期间减少瞬变的影响的元件。
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公开(公告)号:US20190140625A1
公开(公告)日:2019-05-09
申请号:US15808157
申请日:2017-11-09
Applicant: Infineon Technologies AG
Inventor: Dietmar STRAEUSSNIGG , Peter BOGNER , Michael KROPFITSCH , Jens BARRENSCHEEN
CPC classification number: H03H17/0664 , H02P27/08 , H03H17/0276 , H03H17/0286 , H03H17/0671 , H03H17/0685 , H03M1/12
Abstract: Filters are discussed where a first window function and a second window function are applied to a digital input signal, wherein a window length of the first window function is longer than a window length of the second window function. The results of this windowing are integrated.
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公开(公告)号:US20150138006A1
公开(公告)日:2015-05-21
申请号:US14085577
申请日:2013-11-20
Applicant: Infineon Technologies AG
Inventor: Dietmar STRAEUSSNIGG , Andreas WIESBAUER , Jose Luis CEBALLOS
IPC: H03M1/12
Abstract: Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A plurality of analog-to-digital converters (ADCs) can be arranged such that one or more of the ADCs is operating at a sampling rate that is less than others of the plurality of ADCs. For example, a sampling rate interpolator may be used to increase a sampling rate of signals output at the one or more ADCs operating at the lower sampling rate, allowing pipelining of the plurality of ADCs.
Abstract translation: 设备和技术的代表性实现提供模拟输入的模数转换。 可以布置多个模数转换器(ADC),使得一个或多个ADC以低于多个ADC中的其他ADC的采样速率工作。 例如,可以使用采样率内插器来增加在以较低采样率工作的一个或多个ADC处输出的信号的采样率,从而允许多个ADC的流水线化。
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公开(公告)号:US20140139296A1
公开(公告)日:2014-05-22
申请号:US14165564
申请日:2014-01-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Stefano MARSILI , Dietmar STRAEUSSNIGG , Luca BIZJAK , Robert PRIEWASSER , Matteo AGOSTINELLI
IPC: H03K7/08
Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.
Abstract translation: 在装置中,提供脉冲调制切换逻辑以产生脉冲调制器的切换信号,以便产生具有第一脉冲调制控制参数和第二脉冲调制控制参数的脉冲调制信号。 基于第一控制信号控制第一脉冲调制控制参数,并且基于第二控制信号来控制第二脉冲调制控制参数。 提供第一控制环路以根据从脉冲调制信号导出的输出信号产生第一控制信号。 提供第二控制环路以根据输出信号产生第二控制信号。 施加第一和第二控制信号以同时控制第一和第二脉冲调制控制参数。
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