ANALOG-TO-DIGITAL CONVERTER AND CONTROL CIRCUIT WITH A LOW QUIESCENT CURRENT AT LOW LOAD
    1.
    发明申请
    ANALOG-TO-DIGITAL CONVERTER AND CONTROL CIRCUIT WITH A LOW QUIESCENT CURRENT AT LOW LOAD 有权
    模拟数字转换器和低负载时低电流的控制电路

    公开(公告)号:US20150061912A1

    公开(公告)日:2015-03-05

    申请号:US14476638

    申请日:2014-09-03

    CPC classification number: H03M1/002 G05F1/575 H03M1/38 H03M1/44 H03M1/46 H03M1/802

    Abstract: A circuit contains a successive approximation register and an adjustable capacitor with a set input for adjusting a capacitance value of the adjustable capacitor. Moreover, it comprises a comparator having an input coupled to a terminal of the adjustable capacitor, and with an at least one output, wherein at least one of the outputs of the comparator is coupled to an input of the successive approximation register. The circuit also includes an analog input which is coupled to a terminal of the adjustable capacitor. The circuit may be set into a first operating state and a second operating state, wherein an output of the circuit is controlled in the first operating state by the successive approximation register and is not controlled in the second operating state by the successive approximation register, but by the comparator.

    Abstract translation: 一个电路包含一个逐次逼近寄存器和一个带可调电容器的可调电容器,用于调节可调电容器的电容值。 而且,它包括比较器,其具有耦合到可调电容器的端子的输入端和至少一个输出端,其中比较器的输出中的至少一个耦合到逐次逼近寄存器的输入端。 电路还包括耦合到可调电容器的端子的模拟输入端。 电路可以被设置为第一操作状态和第二操作状态,其中电路的输出由逐次逼近寄存器控制在第一操作状态,并且在逐次逼近寄存器中不被控制在第二操作状态,但是 由比较方。

    BUILT-IN-SELF-TEST FOR AN ANALOG-TO-DIGITAL CONVERTER
    3.
    发明申请
    BUILT-IN-SELF-TEST FOR AN ANALOG-TO-DIGITAL CONVERTER 有权
    用于模拟数字转换器的内置自检

    公开(公告)号:US20150009052A1

    公开(公告)日:2015-01-08

    申请号:US13934554

    申请日:2013-07-03

    CPC classification number: H03M1/1071 G01R31/2884 H03M1/12

    Abstract: A semiconductor chip with a built-in-self-test circuit including a first analog-to-digital converter (ADC) configured to convert an analog input voltage signal received at its input into a digital output voltage signal that characterizes the first ADC; and a second ADC coupled to the input of the first ADC and configured to convert the analog input voltage signal received at its input to a digital feedback voltage signal, wherein the analog input voltage signal is generated based on the digital feedback signal.

    Abstract translation: 一种具有内置自测电路的半导体芯片,包括:第一模数转换器(ADC),被配置为将其输入端接收的模拟输入电压信号转换成表征第一ADC的数字输出电压信号; 以及耦合到所述第一ADC的输入并被配置为将在其输入处接收的模拟输入电压信号转换为数字反馈电压信号的第二ADC,其中所述模拟输入电压信号是基于所述数字反馈信号产生的。

    SENSOR DEVICE
    7.
    发明申请
    SENSOR DEVICE 审中-公开
    传感器设备

    公开(公告)号:US20170055850A1

    公开(公告)日:2017-03-02

    申请号:US15252954

    申请日:2016-08-31

    Abstract: A sensor device includes an implantable sensor unit, a transponder unit, and a wired connection flexibly and electrically connecting the implantable sensor unit and the transponder unit. The implantable sensor unit is adapted to be implanted into a body. The implantable sensor unit includes a comparator and a sensor adapted to sense a characteristic of the body in vivo. The sensor is adapted to supply an analogue signal to a first input of the comparator. The transponder unit is adapted to supply a control signal to the implantable sensor unit and to receive an output signal of the comparator. The implantable sensor unit is adapted to supply an analogue approximation signal to a second input of the comparator in response to the control signal. The wired connection is adapted to transmit the control signal and the output signal of the comparator.

    Abstract translation: 传感器装置包括可植入传感器单元,应答器单元和有线连接,其可灵活地和电连接植入式传感器单元和应答器单元。 植入式传感器单元适于植入体内。 可植入传感器单元包括比较器和用于感测身体体内特征的传感器。 传感器适于将模拟信号提供给比较器的第一输入端。 应答器单元适于向可植入传感器单元提供控制信号并接收比较器的输出信号。 可植入传感器单元适于响应于控制信号向比较器的第二输入端提供模拟近似信号。 有线连接适用于发送比较器的控制信号和输出信号。

    GAIN CALIBRATION FOR ADC WITH EXTERNAL REFERENCE
    8.
    发明申请
    GAIN CALIBRATION FOR ADC WITH EXTERNAL REFERENCE 有权
    具有外部参考的ADC的增益校准

    公开(公告)号:US20170012639A1

    公开(公告)日:2017-01-12

    申请号:US14793118

    申请日:2015-07-07

    Inventor: Peter BOGNER

    Abstract: Representative implementations of devices and techniques provide gain calibration for analog to digital conversion of time-discrete analog inputs. An adjustable capacitance arrangement is used to reduce or eliminate gain error caused by capacitor mismatch within the ADC. For example, the capacitance arrangement may include an array of multiple switched capacitances arranged to track gain error during search algorithm operation.

    Abstract translation: 器件和技术的代表性实现为时间离散模拟输入的模数转换提供增益校准。 可调电容布置用于减少或消除由ADC内的电容器失配引起的增益误差。 例如,电容布置可以包括布置成在搜索算法操作期间跟踪增益误差的多个开关电容的阵列。

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