公开(公告)号：US20240079297A1

公开(公告)日：2024-03-07

申请号：US17903512

申请日：2022-09-06

Applicant: Infineon Technologies AG

Inventor： Peter Luniewski ,  Markus Neubert ,  Michael Fuegl ,  Waldemar Jakobi ,  Michael Leipenat ,  Egbert Lamminger

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49575 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49562 ,  H01L24/48 ,  H01L2224/48245

Abstract: A semiconductor package includes a substrate including a die pad, first and second discrete transistor dies mounted on the die pad, an encapsulant body that encapsulates the first and second discrete transistor dies, and a plurality of leads that are exposed from the encapsulant body, wherein the first and second discrete transistor dies are connected in parallel with one another by electrical interconnections that electrically connect common terminals of the first and second discrete transistor dies to one of the leads, and wherein at least one of the electrical interconnections has a balanced configuration that provides substantially identical electrical impedance as between the common terminals of the first and second discrete transistor dies and the lead to which they are connected.

公开(公告)号：US20240047289A1

公开(公告)日：2024-02-08

申请号：US18356762

申请日：2023-07-21

Applicant: Infineon Technologies AG

Inventor： Marco Bässler ,  Patrik Holt Jones ,  Ludwig Busch ,  Egbert Lamminger

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/48 ,  H01L23/495

CPC classification number: H01L23/3121 ,  H01L21/56 ,  H01L23/48 ,  H01L23/495 ,  H01L25/07

Abstract: A molded power semiconductor module includes: one or more power semiconductor dies; a molded body at least partially encapsulating each power semiconductor die and having opposing first and second sides, and lateral sides connecting the first and second sides; and first and second power contacts arranged laterally next to each other at a first one of the lateral sides of the molded body and electrically coupled to the power semiconductor die(s). The power contacts each have opposing first and second sides, each first side having an exposed part exposed from the molded body, each second side having a part that is arranged in a vertical direction below an outline of the respective exposed part of the first side and that is at least partially covered by a protrusion part of the molded body. The vertical direction is perpendicular to the first and second sides of the power contacts.

公开(公告)号：US20240332136A1

公开(公告)日：2024-10-03

申请号：US18609133

申请日：2024-03-19

Applicant: Infineon Technologies AG

Inventor： Marco Bäßler ,  Michal Chajneta ,  Thorsten Scharf ,  Egbert Lamminger

IPC: H01L23/495

CPC classification number: H01L23/49537 ,  H01L23/49548 ,  H01L23/49575

Abstract: A power semiconductor device includes: at least one substrate; at least one power semiconductor die arranged over the at least one substrate; a first leadframe arranged over the at least one power semiconductor substrate and over the at least one power semiconductor die, the first leadframe being arranged at least partially in a first plane and including one or more connecting portions extending out of the first plane in a first direction; and a second leadframe at least partially arranged in a second plane above or below the first plane and including one or more attachment sites. The one or more connecting portions extend into the second plane at the one or more attachment sites. The one or more connecting portions are arranged at a non-zero distance from the second leadframe, the non-zero distance being bridged by weld seams at the one or more attachment sites.