公开(公告)号：US20150214297A1

公开(公告)日：2015-07-30

申请号：US14166880

申请日：2014-01-29

Applicant: Infineon Technologies AG

Inventor： Volker Strutz ,  Horst Theuss ,  Chee Voon Tan ,  Hui Teng Wang

IPC: H01L29/06

CPC classification number: H01L29/0649 ,  H01L24/32 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2224/45099

Abstract: An electronic array may include a first electronic component which has a first operation voltage, a second electronic component which has a second operation voltage, wherein the second operation voltage is different from the first operation voltage and wherein the first electronic component and the second electronic component are arranged over each other, an isolation layer between the first electronic component and the second electronic component, wherein the isolation layer electrically isolates the first electronic component from the second electronic component, at least one connection layer formed at least partially between the isolation layer and the first electronic component or between the isolation layer and the second electronic component, wherein the connection layer includes a first portion and a second portion, wherein the first portion and the second portion each extend from the corresponding electronic component to the isolation layer, wherein the first portion includes an electrically isolating material which fixes the isolation layer to the corresponding electronic component and wherein the second portion includes an electrically conductive material which electrically couples the corresponding electronic component to the isolation layer.

Abstract translation: 电子阵列可以包括具有第一操作电压的第一电子部件，具有第二操作电压的第二电子部件，其中第二操作电压不同于第一操作电压，并且其中第一电子部件和第二电子部件 在第一电子部件和第二电子部件之间布置有隔离层，其中隔离层将第一电子部件与第二电子部件电隔离，至少一个连接层至少部分地形成在隔离层和 所述第一电子部件或所述隔离层和所述第二电子部件之间，其中所述连接层包括第一部分和第二部分，其中所述第一部分和所述第二部分各自从相应的电子部件延伸到所述隔离层，其中， 第一部分包括a n隔离材料，其将隔离层固定到相应的电子部件，并且其中第二部分包括将相应的电子部件电耦合到隔离层的导电材料。

公开(公告)号：US10418343B2

公开(公告)日：2019-09-17

申请号：US15832336

申请日：2017-12-05

Applicant: Infineon Technologies AG

Inventor： Hui Teng Wang ,  Swain Hong Yeo

IPC: H01L25/065 ,  H01L23/495 ,  H01L23/31 ,  H01L23/367 ,  H01L25/00 ,  H01L21/78 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

公开(公告)号：US09111772B1

公开(公告)日：2015-08-18

申请号：US14166880

申请日：2014-01-29

Applicant: Infineon Technologies AG

Inventor： Volker Strutz ,  Horst Theuss ,  Chee Voon Tan ,  Hui Teng Wang

IPC: H01L29/06

CPC classification number: H01L29/0649 ,  H01L24/32 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2224/45099

Abstract: An electronic array may include a first electronic component which has a first operation voltage, a second electronic component which has a second operation voltage, wherein the second operation voltage is different from the first operation voltage and wherein the first electronic component and the second electronic component are arranged over each other, an isolation layer between the first electronic component and the second electronic component, wherein the isolation layer electrically isolates the first electronic component from the second electronic component, at least one connection layer formed at least partially between the isolation layer and the first electronic component or between the isolation layer and the second electronic component, wherein the connection layer includes a first portion and a second portion, wherein the first portion and the second portion each extend from the corresponding electronic component to the isolation layer, wherein the first portion includes an electrically isolating material which fixes the isolation layer to the corresponding electronic component and wherein the second portion includes an electrically conductive material which electrically couples the corresponding electronic component to the isolation layer.

Abstract translation: 电子阵列可以包括具有第一操作电压的第一电子部件，具有第二操作电压的第二电子部件，其中第二操作电压不同于第一操作电压，并且其中第一电子部件和第二电子部件 在第一电子部件和第二电子部件之间布置有隔离层，其中隔离层将第一电子部件与第二电子部件电隔离，至少一个连接层至少部分地形成在隔离层和 所述第一电子部件或所述隔离层和所述第二电子部件之间，其中所述连接层包括第一部分和第二部分，其中所述第一部分和所述第二部分各自从相应的电子部件延伸到所述隔离层，其中， 第一部分包括a n隔离材料，其将隔离层固定到相应的电子部件，并且其中第二部分包括将相应的电子部件电耦合到隔离层的导电材料。

公开(公告)号：US10861828B2

公开(公告)日：2020-12-08

申请号：US16520872

申请日：2019-07-24

Applicant: Infineon Technologies AG

Inventor： Hui Teng Wang ,  Swain Hong Yeo

IPC: H01L25/065 ,  H01L23/495 ,  H01L23/31 ,  H01L23/367 ,  H01L25/00 ,  H01L21/78 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.

公开(公告)号：US20190172815A1

公开(公告)日：2019-06-06

申请号：US15832336

申请日：2017-12-05

Applicant: Infineon Technologies AG

Inventor： Hui Teng Wang ,  Swain Hong Yeo

IPC: H01L25/065 ,  H01L23/495 ,  H01L23/31 ,  H01L23/367 ,  H01L25/00 ,  H01L21/78 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/49503 ,  H01L23/49537 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.