公开(公告)号：US11018728B2

公开(公告)日：2021-05-25

申请号：US16423499

申请日：2019-05-28

Applicant: Infineon Technologies AG

Inventor： Oliver Lang ,  Werner Arriola ,  Vincenzo Fiore ,  Alexander Melzer

IPC: H04B7/0408 ,  H04B1/48 ,  H03M1/12 ,  G01S13/82 ,  G01S13/34 ,  G01S7/40

Abstract: A circuit includes a transmission channel that outputs a continuous-wave signal based on a reference signal, a transmit monitoring signal path that couples out a portion of the transmit signal as a monitoring signal, a test phase shifter that receives the reference signal and generates a phase-shifted signal based on a sequence of phase offsets applied to the reference signal, a phase mixer that mixes the phase-shifted signal and the monitoring signal to generate a mixer output signal including a plurality of direct current (DC) values, an analog-to-digital converter that samples the mixer output signal in order to provide a sequence of DC values; and a monitor circuit that applies a discrete Fourier transform (DFT) to the sequence of DC values to generate a plurality of DFT bins with corresponding DFT bin values, and generate compensated phase information of the transmission channel using at least two DFT bin values.

公开(公告)号：US10805135B2

公开(公告)日：2020-10-13

申请号：US16529008

申请日：2019-08-01

Applicant: Infineon Technologies AG

Inventor： Oliver Lang ,  Alexander Onic ,  Christian Schmid

IPC: H04L27/28 ,  H04L27/26 ,  H04L5/00 ,  G01S13/00 ,  G01S13/02

Abstract: Methods for processing an OFDM radar signal are provided. A plurality of Nc×NDS receive samples corresponding to a number of NDS consecutive OFDM symbols is received, each OFDM symbol comprising a plurality of Nc subcarriers modulated with a respective modulation symbol. Each of the plurality of Nc×NDS receive samples is divided by its respective modulation symbol to generate a number of NDS processed OFDM symbols. The number of NDS processed OFDM symbols is decimated to generate at least one decimated OFDM symbol. A first type discrete Fourier transform (e.g. IFFT) of the at least one decimated OFDM symbol is performed to generate at least one first transformed vector.

公开(公告)号：US11635489B2

公开(公告)日：2023-04-25

申请号：US16909113

申请日：2020-06-23

Applicant: Infineon Technologies AG

Inventor： Vincenzo Fiore ,  Werner Arriola ,  Rene Kobler ,  Oliver Lang ,  Alexander Melzer

IPC: G01S7/40

Abstract: A method for the use in a radar system is described herein. In accordance with one embodiment, the method includes providing a local oscillator signal to an RF output channel of a radar system. The RF output channel is configured to generate, in an enabled state, an RF output signal based on the local oscillator signal. The method further includes determining a first measurement signal based on the local oscillator signal and a first representation of the RF output signal, while the RF output channel is disabled, and thus the first measurement signal represents crosstalk. Further, the method includes determining a second measurement signal based on the local oscillator signal and a second representation of the RF output signal while the RF output channel is enabled. A phase value associated with the RF output channel is determined based on the first measurement signal and the second measurement signal.

公开(公告)号：US11831325B2

公开(公告)日：2023-11-28

申请号：US17579022

申请日：2022-01-19

Applicant: Infineon Technologies AG

Inventor： Matthias Wagner ,  Thomas Bauernfeind ,  Oliver Lang

IPC: H03M1/10 ,  H03M1/16 ,  H03M1/44 ,  H03M1/06

CPC classification number: H03M1/1023 ,  H03M1/16 ,  H03M1/44 ,  H03M1/0695

Abstract: A method of operating a pipelined analog-to-digital converter (ADC) having a plurality of output stages includes: performing a first calibration process for the pipelined ADC to update a parameter vector of the pipelined ADC, where components of the parameter vector are used for correcting nonlinearity of the pipelined ADC, where performing the first calibration process includes: providing an input signal to the pipelined ADC; converting, by the pipelined ADC, the input signal into a first digital output; providing a scaled version of the input signal to the pipelined ADC, where the scaled version of the input signal is generated by scaling the input signal by a scale factor; converting, by the pipelined ADC, the scaled version of the input signal into a second digital output; and calibrating the pipelined ADC using the first digital output and the second digital output.

公开(公告)号：US20230231568A1

公开(公告)日：2023-07-20

申请号：US17579022

申请日：2022-01-19

Applicant: Infineon Technologies AG

Inventor： Matthias Wagner ,  Thomas Bauernfeind ,  Oliver Lang

IPC: H03M1/10

CPC classification number: H03M1/1023

Abstract: A method of operating a pipelined analog-to-digital converter (ADC) having a plurality of output stages includes: performing a first calibration process for the pipelined ADC to update a parameter vector of the pipelined ADC, where components of the parameter vector are used for correcting nonlinearity of the pipelined ADC, where performing the first calibration process includes: providing an input signal to the pipelined ADC; converting, by the pipelined ADC, the input signal into a first digital output; providing a scaled version of the input signal to the pipelined ADC, where the scaled version of the input signal is generated by scaling the input signal by a scale factor; converting, by the pipelined ADC, the scaled version of the input signal into a second digital output; and calibrating the pipelined ADC using the first digital output and the second digital output.

公开(公告)号：US11693106B2

公开(公告)日：2023-07-04

申请号：US16675574

申请日：2019-11-06

Applicant: Infineon Technologies AG

Inventor： Oliver Lang ,  Michael Gerstmair ,  Alexander Melzer ,  Christian Schmid

IPC: G01S13/58 ,  G01S7/41 ,  H04B7/04 ,  H04B7/0413

CPC classification number: G01S13/584 ,  G01S7/415 ,  H04B7/0413

Abstract: Methods for detecting radar targets are provided. According to one exemplary embodiment, the method includes providing a digital radar signal having a sequence of signal segments. Each signal segment of the sequence is respectively associated with a chirp of a transmitted RF radar signal. The method further includes detecting one or more radar targets based on a first subsequence of successive signal segments of the sequence. For each detected radar target, a distance value and a velocity value are determined. If a group of radar targets having overlapping signal components has been detected, a respective spectral value is calculated for each radar target of the group of radar targets based on a second subsequence of the sequence of signal segments and further based on the velocity values ascertained for the group of radar targets.

公开(公告)号：US11366199B2

公开(公告)日：2022-06-21

申请号：US16697782

申请日：2019-11-27

Applicant: Infineon Technologies AG

Inventor： Oliver Lang ,  Michael Gerstmair ,  Alexander Melzer ,  Alexander Onic ,  Christian Schmid

IPC: G01S7/40 ,  G01S13/00 ,  G01S13/931

Abstract: A method for a radar system is described. In accordance with one example implementation, the method comprises generating a frequency-modulated RF oscillator signal and feeding the RF oscillator signal to a first transmitting channel and a second transmitting channel. The method further comprises generating a first RF transmission signal in the first transmitting channel based on the RF oscillator signal, emitting the first RF transmission signal via a first transmitting antenna, receiving a first RF radar signal via a receiving antenna, and converting the first RF radar signal to a baseband, as a result of which a first baseband signal is obtained, which has a first signal component having a first frequency and a first phase, where the first signal component is assignable to direct crosstalk from the first transmitting antenna. This procedure is repeated for the second transmitting channel.

公开(公告)号：US11239990B2

公开(公告)日：2022-02-01

申请号：US16891445

申请日：2020-06-03

Applicant: Infineon Technologies AG

Inventor： Vincenzo Fiore ,  Werner Arriola ,  Oliver Lang ,  Alexander Melzer

IPC: H04L7/00

Abstract: Noise test systems, methods, and circuitries are provided for determining a phase error of a first modulator using a second modulator. In one example, an integrated circuit device includes a first modulator configured to modulate a first signal to generate a first modulated signal and a second modulator configured to modulate a second signal to generate a second modulated signal. The first signal and the second signal are based on the same reference signal. The integrated circuit device also includes analysis circuitry configured to determine a phase error of the first modulator based on the first modulated signal and the second modulated signal.