Homogeneity enforced calibration for pipelined ADC

    公开(公告)号:US11831325B2

    公开(公告)日:2023-11-28

    申请号:US17579022

    申请日:2022-01-19

    CPC classification number: H03M1/1023 H03M1/16 H03M1/44 H03M1/0695

    Abstract: A method of operating a pipelined analog-to-digital converter (ADC) having a plurality of output stages includes: performing a first calibration process for the pipelined ADC to update a parameter vector of the pipelined ADC, where components of the parameter vector are used for correcting nonlinearity of the pipelined ADC, where performing the first calibration process includes: providing an input signal to the pipelined ADC; converting, by the pipelined ADC, the input signal into a first digital output; providing a scaled version of the input signal to the pipelined ADC, where the scaled version of the input signal is generated by scaling the input signal by a scale factor; converting, by the pipelined ADC, the scaled version of the input signal into a second digital output; and calibrating the pipelined ADC using the first digital output and the second digital output.

    Homogeneity Enforced Calibration for Pipelined ADC

    公开(公告)号:US20230231568A1

    公开(公告)日:2023-07-20

    申请号:US17579022

    申请日:2022-01-19

    CPC classification number: H03M1/1023

    Abstract: A method of operating a pipelined analog-to-digital converter (ADC) having a plurality of output stages includes: performing a first calibration process for the pipelined ADC to update a parameter vector of the pipelined ADC, where components of the parameter vector are used for correcting nonlinearity of the pipelined ADC, where performing the first calibration process includes: providing an input signal to the pipelined ADC; converting, by the pipelined ADC, the input signal into a first digital output; providing a scaled version of the input signal to the pipelined ADC, where the scaled version of the input signal is generated by scaling the input signal by a scale factor; converting, by the pipelined ADC, the scaled version of the input signal into a second digital output; and calibrating the pipelined ADC using the first digital output and the second digital output.

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