公开(公告)号：US20130062770A1

公开(公告)日：2013-03-14

申请号：US13671573

申请日：2012-11-08

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim BARTH ,  Mathias VAUPEL ,  Rainer STEINER ,  Werner ROBL ,  Jens POHL ,  Joern PLAGMANN ,  Gottfried BEER

IPC: H01L23/532

CPC classification number: H01L21/76843 ,  H01L21/76807 ,  H01L21/76879 ,  H01L23/49816 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0106 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a barrier layer overlying a workpiece surface; a seed layer overlying the barrier layer; an inhibitor layer overlying said seed layer, the inhibitor layer having a opening exposing a portion of the seed layer, and a fill layer overlying the exposed portion of the seed layer.

Abstract translation: 一个或多个实施例涉及半导体结构，包括：覆盖工件表面的阻挡层; 覆盖阻挡层的种子层; 覆盖所述种子层的抑制剂层，所述抑制剂层具有暴露所述种子层的一部分的开口以及覆盖所述种子层的暴露部分的填充层。

公开(公告)号：US20150015249A1

公开(公告)日：2015-01-15

申请号：US13939113

申请日：2013-07-10

Applicant: Infineon Technologies AG

Inventor： Udo AUSSERLECHNER ,  Volker STRUTZ ,  Jochen DANGELMAIER ,  Rainer STEINER

IPC: G01R33/00 ,  B29C70/74

CPC classification number: G01R33/0047 ,  B29C70/745 ,  G01R15/20 ,  H01L24/48 ,  H01L2224/4809 ,  H01L2224/48451 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A current sensor device includes a casing having a cavity and a conductor fixedly mounted to the casing. A semiconductor chip configured to sense a magnetic field is arranged in the cavity. An electrically insulating medium is configured to at least partially fill the cavity of the casing.

Abstract translation: 电流传感器装置包括具有腔体和固定地安装在壳体上的导体的壳体。 构造成感测磁场的半导体芯片布置在空腔中。 电绝缘介质构造成至少部分地填充壳体的空腔。

公开(公告)号：US20130309864A1

公开(公告)日：2013-11-21

申请号：US13671583

申请日：2012-11-08

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim BARTH ,  Mathias VAUPEL ,  Rainer STEINER ,  Werner ROBL ,  Jens POHL ,  Joern PLAGMANN ,  Gottfried BEER

IPC: H01L21/768

CPC classification number: H01L21/76843 ,  H01L21/76807 ,  H01L21/76879 ,  H01L23/49816 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0106 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00

Abstract: One or more embodiments relate to a method of forming a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a seed layer over the barrier layer; forming an inhibitor layer over the seed layer; removing a portion of said inhibitor layer to expose a portion of the seed layer; and selectively depositing a fill layer on the exposed seed layer.

Abstract translation: 一个或多个实施例涉及一种形成半导体结构的方法，包括：提供工件; 在工件上形成阻挡层; 在阻挡层上形成种子层; 在种子层上形成抑制层; 去除所述抑制剂层的一部分以暴露所述种子层的一部分; 并且在曝光的种子层上选择性地沉积填充层。