公开(公告)号：US20130309864A1

公开(公告)日：2013-11-21

申请号：US13671583

申请日：2012-11-08

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim BARTH ,  Mathias VAUPEL ,  Rainer STEINER ,  Werner ROBL ,  Jens POHL ,  Joern PLAGMANN ,  Gottfried BEER

IPC: H01L21/768

CPC classification number: H01L21/76843 ,  H01L21/76807 ,  H01L21/76879 ,  H01L23/49816 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0106 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00

Abstract: One or more embodiments relate to a method of forming a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a seed layer over the barrier layer; forming an inhibitor layer over the seed layer; removing a portion of said inhibitor layer to expose a portion of the seed layer; and selectively depositing a fill layer on the exposed seed layer.

Abstract translation: 一个或多个实施例涉及一种形成半导体结构的方法，包括：提供工件; 在工件上形成阻挡层; 在阻挡层上形成种子层; 在种子层上形成抑制层; 去除所述抑制剂层的一部分以暴露所述种子层的一部分; 并且在曝光的种子层上选择性地沉积填充层。

公开(公告)号：US20170293833A1

公开(公告)日：2017-10-12

申请号：US15482865

申请日：2017-04-10

Applicant: Infineon Technologies AG

Inventor： Jens POHL ,  Frank PUESCHNER

IPC: G06K19/077 ,  G06K19/07

CPC classification number: G06K19/07775 ,  G06K19/0723 ,  G06K19/07722 ,  G06K19/07749 ,  G06K19/07769 ,  G06K19/07794

Abstract: In various embodiments, a smart card is provided. The smart card includes a smart card body having a first depression for accommodating a chip carrier and having a second depression in the first depression for accommodating a chip that is arranged on the chip carrier, and a booster antenna structure having a chip coupling region for inductive coupling to the chip. The chip coupling region includes a plurality of coupling turns. The chip coupling region is embedded in the smart card body. The bottom of the second depression is arranged in the smart card body less deeply than the highest region of the coupling turns which faces the second depression.

公开(公告)号：US20160141248A1

公开(公告)日：2016-05-19

申请号：US14882524

申请日：2015-10-14

Applicant: Infineon Technologies AG

Inventor： Frank PUESCHNER ,  Jens POHL ,  Thomas SPOETTL ,  Peter STAMPKA

IPC: H01L23/538 ,  H01L23/66 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/5388 ,  G06K19/072 ,  G06K19/07747 ,  G06K19/07754 ,  G06K19/07784 ,  H01L21/56 ,  H01L23/3142 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A chip card module arrangement may include a first surface and a second surface, which are opposite from one another, and a chip receptacle for one or more semiconductor chips on the surfaces. The chip card module arrangement may further include a connecting material receiving area on one of the two surfaces, the connecting material receiving area only taking up a portion of the surface.

Abstract translation: 芯片卡模块布置可以包括彼此相对的第一表面和第二表面，以及用于表面上的一个或多个半导体芯片的芯片插座。 芯片卡模块装置还可以包括在两个表面中的一个表面上的连接材料接收区域，连接材料接收区域仅占据表面的一部分。

公开(公告)号：US20130062770A1

公开(公告)日：2013-03-14

申请号：US13671573

申请日：2012-11-08

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim BARTH ,  Mathias VAUPEL ,  Rainer STEINER ,  Werner ROBL ,  Jens POHL ,  Joern PLAGMANN ,  Gottfried BEER

IPC: H01L23/532

CPC classification number: H01L21/76843 ,  H01L21/76807 ,  H01L21/76879 ,  H01L23/49816 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0106 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a barrier layer overlying a workpiece surface; a seed layer overlying the barrier layer; an inhibitor layer overlying said seed layer, the inhibitor layer having a opening exposing a portion of the seed layer, and a fill layer overlying the exposed portion of the seed layer.

Abstract translation: 一个或多个实施例涉及半导体结构，包括：覆盖工件表面的阻挡层; 覆盖阻挡层的种子层; 覆盖所述种子层的抑制剂层，所述抑制剂层具有暴露所述种子层的一部分的开口以及覆盖所述种子层的暴露部分的填充层。

公开(公告)号：US20150339565A1

公开(公告)日：2015-11-26

申请号：US14719374

申请日：2015-05-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Frank PUESCHNER ,  Alfred HAIMERL ,  Jens POHL ,  Wolfgang SCHINDLER

IPC: G06K19/077 ,  H01L21/56

CPC classification number: G06K19/07747 ,  G06K19/07722 ,  G06K19/07769 ,  G06K19/07775 ,  H01L21/56 ,  H01L23/49855 ,  H01L23/49883 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A smart card module includes a substrate having a first main surface and a second main surface, which is opposite the first main surface. The substrate has a plurality of plated-through holes, which extend through the substrate from the first main surface to the second main surface. The smart card module further includes a chip over the first main surface of the substrate, a first metal structure over the second main surface of the substrate, electrically insulating material, which covers the first metal structure, and a second metal structure over the electrically insulating material, wherein the second metal structure is electrically insulated from the first metal structure by the electrically insulating material. The chip is connected to the first metal structure by at least one first plated-through hole. The chip is connected to the second metal structure by at least one second plated-through hole.

Abstract translation: 智能卡模块包括具有与第一主表面相对的第一主表面和第二主表面的基板。 基板具有多个电镀通孔，其从基板从第一主表面延伸到第二主表面。 智能卡模块还包括在基板的第一主表面上的芯片，在基板的第二主表面上的第一金属结构，覆盖第一金属结构的电绝缘材料，以及电绝缘上的第二金属结构 材料，其中所述第二金属结构通过所述电绝缘材料与所述第一金属结构电绝缘。 芯片通过至少一个第一电镀通孔连接到第一金属结构。 芯片通过至少一个第二电镀通孔连接到第二金属结构。

公开(公告)号：US20150069132A1

公开(公告)日：2015-03-12

申请号：US14483174

申请日：2014-09-11

Applicant: Infineon Technologies AG

Inventor： Frank PUESCHNER ,  Thomas Spoettl ,  Jens POHL ,  Peter STAMPKA

IPC: G06K19/077 ,  H01L23/00

CPC classification number: G06K19/07728 ,  G06K19/07722 ,  G06K19/07747 ,  G06K19/07775 ,  H01L21/56 ,  H01L23/3121 ,  H01L24/83 ,  H01L2224/83201 ,  H01L2224/83902 ,  H01L2924/06 ,  H01L2924/12042 ,  H01L2924/141 ,  H01L2924/00

Abstract: A method for producing a smart card module arrangement includes: arranging a smart card module on a first carrier layer, wherein the first carrier layer is free of a prefabricated smart card module receptacle cutout for receiving the smart card module. The smart card module includes: a substrate; a chip on the substrate; a first mechanical reinforcement structure between the chip and the substrate. The first mechanical reinforcement structure covers at least one part of a surface of the chip. The method further includes applying a second carrier layer to the smart card module, wherein the second carrier layer is free of a prefabricated smart card module receptacle cutout for receiving the smart card module; and at least one of laminating or pressing the first carrier layer with the second carrier layer, such that the smart card module is enclosed by the first carrier layer and the second carrier layer.

Abstract translation: 一种用于制造智能卡模块装置的方法包括：将智能卡模块布置在第一载体层上，其中第一载体层没有用于接收智能卡模块的预制智能卡模块插座切口。 智能卡模块包括：基板; 衬底上的芯片; 在芯片和衬底之间的第一机械加强结构。 第一机械加强结构覆盖芯片表面的至少一部分。 该方法还包括将第二载体层应用于智能卡模块，其中第二载体层没有用于接收智能卡模块的预制智能卡模块插座切口; 以及将第一载体层与第二载体层层压或压制中的至少一个，使得智能卡模块被第一载体层和第二载体层包围。