Vertical Shunt Resistor
    3.
    发明申请
    Vertical Shunt Resistor 有权
    垂直并联电阻器

    公开(公告)号:US20150091551A1

    公开(公告)日:2015-04-02

    申请号:US14497437

    申请日:2014-09-26

    Abstract: A measurement resistor for current measurement is described. According to one exemplary embodiment, the measurement resistor includes a first and a second metal layer, an electrically insulating interlayer and a resistive layer. The first metal layer is arranged in a first plane. The second metal layer is arranged in a second plane that is essentially parallel to the first plane and separated from the first plane. The electrically insulating interlayer is arranged between the first and second metal layers and mechanically connects the first and second metal layers to one another. The resistive layer electrically connects the first and second metal layers to one another.

    Abstract translation: 描述用于电流测量的测量电阻器。 根据一个示例性实施例,测量电阻器包括第一和第二金属层,电绝缘中间层和电阻层。 第一金属层布置在第一平面中。 第二金属层布置在基本上平行于第一平面并与第一平面分离的第二平面中。 电绝缘中间层布置在第一和第二金属层之间并将第一和第二金属层彼此机械连接。 电阻层将第一和第二金属层彼此电连接。

    Pressure Contact Arrangement and Method for Producing a Pressure Contact Arrangement
    4.
    发明申请
    Pressure Contact Arrangement and Method for Producing a Pressure Contact Arrangement 有权
    压力接触排列和压力接触排列方法

    公开(公告)号:US20130278326A1

    公开(公告)日:2013-10-24

    申请号:US13854987

    申请日:2013-04-02

    Inventor: Thilo Stolze

    Abstract: A pressure contact arrangement includes a pressure contact device having an upper contact piece and a lower contact piece, one or more vertical first semiconductor chips and a peripherally closed adhesive bead. Each vertical first semiconductor chip has an upper side, a lower side opposite the upper side, a peripherally closed narrow side adjoining the upper side and the lower side and connecting the upper and lower sides, an upper electrical contact face arranged on the upper side, and a lower electrical contact face arranged on the lower side. The peripherally closed adhesive bead surrounds each vertical first semiconductor chip and fastens each vertical first semiconductor chip to the pressure contact device. A peripherally closed connecting face is provided between each adhesive bead and the narrow side of the corresponding vertical first semiconductor chip that laterally surrounds the vertical first semiconductor chip.

    Abstract translation: 压力接触装置包括具有上部接触件和下部接触件的压力接触装置,一个或多个垂直的第一半导体芯片和外围密封的粘合剂珠。 每个垂直第一半导体芯片具有上侧,与上侧相反的下侧,邻接上侧和下侧的外围闭合的窄侧,并且连接上侧和下侧,布置在上侧的上电接触面, 以及设置在下侧的下电接触面。 外围封闭的粘合剂珠围绕每个垂直的第一半导体芯片,并将每个垂直的第一半导体芯片紧固到压力接触装置。 在每个粘合剂珠和横向围绕垂直的第一半导体芯片的相应垂直的第一半导体芯片的窄边之间设置一个外围封闭的连接面。

    Pressure contact arrangement and method for producing a pressure contact arrangement
    5.
    发明授权
    Pressure contact arrangement and method for producing a pressure contact arrangement 有权
    压力接触装置和制造压力接触装置的方法

    公开(公告)号:US08933569B2

    公开(公告)日:2015-01-13

    申请号:US13854987

    申请日:2013-04-02

    Inventor: Thilo Stolze

    Abstract: A pressure contact arrangement includes a pressure contact device having an upper contact piece and a lower contact piece, one or more vertical first semiconductor chips and a peripherally closed adhesive bead. Each vertical first semiconductor chip has an upper side, a lower side opposite the upper side, a peripherally closed narrow side adjoining the upper side and the lower side and connecting the upper and lower sides, an upper electrical contact face arranged on the upper side, and a lower electrical contact face arranged on the lower side. The peripherally closed adhesive bead surrounds each vertical first semiconductor chip and fastens each vertical first semiconductor chip to the pressure contact device. A peripherally closed connecting face is provided between each adhesive bead and the narrow side of the corresponding vertical first semiconductor chip that laterally surrounds the vertical first semiconductor chip.

    Abstract translation: 压力接触装置包括具有上部接触件和下部接触件的压力接触装置,一个或多个垂直的第一半导体芯片和外围密封的粘合剂珠。 每个垂直第一半导体芯片具有上侧,与上侧相反的下侧,邻接上侧和下侧的外围闭合的窄侧,并且连接上侧和下侧,布置在上侧的上电接触面, 以及设置在下侧的下电接触面。 外围封闭的粘合剂珠围绕每个垂直的第一半导体芯片,并将每个垂直的第一半导体芯片紧固到压力接触装置。 在每个粘合剂珠和横向围绕垂直的第一半导体芯片的相应垂直的第一半导体芯片的窄边之间设置一个外围封闭的连接面。

Patent Agency Ranking