METHOD OF BOOSTING RON*COFF PERFORMANCE
    1.
    发明申请

    公开(公告)号:US20190245048A1

    公开(公告)日:2019-08-08

    申请号:US16267840

    申请日:2019-02-05

    Abstract: An apparatus includes one or more field effect transistors configured as a switch. Each of the one or more field effect transistors comprises one or more source diffusions, one or more drain diffusions, and one or more gate fingers. Each of the one or more gate fingers is disposed between a source diffusion and a drain diffusion. A first electrical connection to the one or more source diffusions is made using one or more source electrodes that extend from a first end for a first length along a long axis of the source diffusions. A second electrical connection to the one or more drain diffusions is made using one or more drain electrodes that extend from a second end for a second length along a long axis of the drain diffusions. The first length of the one or more source electrodes and the second length of the one or more drain electrodes are generally selected to avoid juxtaposition of the one or more source electrodes and the one or more drain electrodes.

    Method of boosting RON*COFF performance
    2.
    发明授权

    公开(公告)号:US10672877B2

    公开(公告)日:2020-06-02

    申请号:US16267840

    申请日:2019-02-05

    Abstract: An apparatus includes one or more field effect transistors configured as a switch. Each of the one or more field effect transistors comprises one or more source diffusions, one or more drain diffusions, and one or more gate fingers. Each of the one or more gate fingers is disposed between a source diffusion and a drain diffusion. A first electrical connection to the one or more source diffusions is made using one or more source electrodes that extend from a first end for a first length along a long axis of the source diffusions. A second electrical connection to the one or more drain diffusions is made using one or more drain electrodes that extend from a second end for a second length along a long axis of the drain diffusions. The first length of the one or more source electrodes and the second length of the one or more drain electrodes are generally selected to avoid juxtaposition of the one or more source electrodes and the one or more drain electrodes.

    REDUCED TRANSISTOR BRIDGE ATTENUATOR
    4.
    发明申请

    公开(公告)号:US20190131956A1

    公开(公告)日:2019-05-02

    申请号:US16167813

    申请日:2018-10-23

    Inventor: Shawn Bawell

    Abstract: An apparatus includes a bypass circuit a resistor circuit and multiple staggered circuits. The bypass circuit may have a predetermined number of a plurality of transistors connected in series between an input node and an output node. The resistor circuit may have a given number of resistors connected in series between the input node and the output node. Adjoining pairs of the resistors may be connected at given nodes. The staggered circuits may be connected between the given nodes and either the input node or the output node. Each staggered circuit may have a respective number of the transistors connected in series. The bypass circuit, the resistor circuit and the staggered circuits may form part of a bridge attenuator.

    CONTROLLED TRANSISTOR ON-RESISTANCE WITH PREDEFINED TEMPERATURE DEPENDENCE

    公开(公告)号:US20200177137A1

    公开(公告)日:2020-06-04

    申请号:US16203979

    申请日:2018-11-29

    Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate (i) a variable current and (ii) a constant current. The variable current may be proportional to a temperature of the first circuit. The second circuit may be configured to present a resistance through a plurality of first transistors between two ports in response to both the variable current and the constant current. The resistance may have a predefined dependence on the temperature.

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