公开(公告)号：US20190052277A1

公开(公告)日：2019-02-14

申请号：US16017865

申请日：2018-06-25

Applicant: Intel Corporation

Inventor： JAGANNADHA RAO RAPETA ,  ASAD AZAM ,  AMIT KUMAR SRIVASTAVA ,  MIKAL HUNSAKER

IPC: H03L7/08 ,  G05B9/03 ,  H03L7/081

Abstract: Methods and apparatus relating to functional safety clocking framework for real time systems are described. In an embodiment, clock monitoring logic circuitry monitors a plurality of clock signals. Safety island logic circuitry receives an error status signal from the clock monitoring logic circuitry based at least in part on a determination of whether an error exists for at least one of the plurality of clock signals. Safety logic circuitry to receive an interrupt signal from the safety island logic circuitry in response to a determination that the error status signal indicates existence of an error for at least one of the plurality of clock signals. Other embodiments are also disclosed and claimed.

公开(公告)号：US20220091853A1

公开(公告)日：2022-03-24

申请号：US17097055

申请日：2020-11-13

Applicant: Intel Corporation

Inventor： SUBRATA BANIK ,  ASAD AZAM ,  VINCENT JAMES ZIMMER ,  RAJARAM REGUPATHY

IPC: G06F9/4401 ,  G06F13/16 ,  G06F3/06

Abstract: A data processing system comprises a processing core to execute a basic input/output system (BIOS) as part of a boot process. The data processing system also comprises static random-access memory (SRAM) in communication with the processing core. The data processing system also comprises a pre-BIOS component in communication with the SRAM. The pre-BIOS component is configured to execute a pre-BIOS block of firmware before the processing core begins executing the BIOS. The pre-BIOS block, when executed by the pre-BIOS component, causes the pre-BIOS component to (a) initialize the pre-BIOS component, (b) measure an amount of time taken to initialize the pre-BIOS component, and (c) save the measured amount of time to the SRAM as a pre-BIOS boot-time record. Other embodiments are described and claimed.