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公开(公告)号:US20220086226A1
公开(公告)日:2022-03-17
申请号:US17483458
申请日:2021-09-23
Applicant: Intel Corporation
Inventor: Anjali Singhai JAIN , Noam ELATI , Eliel LOUZOUN , Daniel DALY
IPC: H04L67/1097 , G06F9/455 , G06F13/28
Abstract: Examples described herein relate to a network interface device comprising: a device interface; at least one processor; a direct memory access (DMA) device; and a packet processing circuitry. In some examples, the at least one processor, when operational, is configured to: in connection with a first operation: perform a format translation of a first descriptor from a first format associated with an emulated device to a second format associated with the packet processing circuitry and provide, to the packet processing circuitry, the translated first descriptor. In some examples, the at least one processor, when operational, is configured to: in connection with a second operation: perform a descriptor format translation of a second descriptor from the second format associated with the packet processing circuitry to the first format associated with the emulated software device and provide, to the emulated device, the translated second descriptor.
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公开(公告)号:US20240283756A1
公开(公告)日:2024-08-22
申请号:US18425968
申请日:2024-01-29
Applicant: Intel Corporation
Inventor: Shaopeng HE , Cunming LIANG , Jiang YU , Ziye YANG , Ping YU , Bo CUI , Jingjing WU , Liang MA , Hongjun NI , Zhiguo WEN , Changpeng LIU , Anjali Singhai JAIN , Daniel DALY , Yadong LI
IPC: H04L49/9057 , H04L1/1829 , H04L47/34 , H04L47/56 , H04L49/552 , H04L49/90
CPC classification number: H04L49/9057 , H04L1/1841 , H04L47/34 , H04L47/56 , H04L49/552 , H04L49/9094
Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.
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公开(公告)号:US20210288910A1
公开(公告)日:2021-09-16
申请号:US17332815
申请日:2021-05-27
Applicant: Intel Corporation
Inventor: Daniel DALY , Anjali Singhai JAIN , Chih-Jen CHANG , Edmund CHEN , Robert HATHAWAY , Naru Dames SUNDAR , Pawel SZYMANSKI , John MANGAN
IPC: H04L12/815 , H04L12/851 , H04L12/935
Abstract: Examples described herein relate to a network interface device and in some examples, the network interface device includes an Ethernet interface, a host interface, circuitry to be configured to copy a packet payload from a host device through the host interface, form a packet based on the packet payload, and transmit the packet through the Ethernet interface, and circuitry to be configured to apply rate limiting and/or traffic shaping for packets received through the Ethernet interface based on hierarchical quality of service (H-QoS). In some examples, the circuitry is to be configured to apply rate limiting and/or traffic shaping for packets received through the Ethernet interface based on H-QoS comprises a programmable packet processing pipeline that is to be configured to perform one or more of: packet drops of packets received in excess of a receive rate, packet drops based on packet transmission in excess of a transmit rate, and/or traffic shaping of the received packets prior to transmission through one or more output ports. In some examples, to perform packet drops of packets received in excess of a receive rate, the programmable packet processing pipeline is to perform rate limiting per one or more of: class of service, subscriber, service, or interface.
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公开(公告)号:US20220174005A1
公开(公告)日:2022-06-02
申请号:US17673727
申请日:2022-02-16
Applicant: Intel Corporation
Inventor: Namrata LIMAYE , Daniel DALY , Anjali Singhai JAIN , Debashis CHATTERJEE , Venkata Suresh Kumar PARUCHURI
IPC: H04L45/60 , H04L45/586 , H04L45/021 , H04L45/00 , H04L45/24
Abstract: Examples described herein relate to a packet processing device that includes a programmable packet processing pipeline that is configured using a virtual switch. In some examples, the programmable packet processing pipeline is to receive configurations from multiple control planes via the virtual switch to configure packet processing actions. In some examples, the virtual switch is to provide inter-virtual execution environment communications. In some examples, the programmable packet processing pipeline is configured using a programming language.
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公开(公告)号:US20220166666A1
公开(公告)日:2022-05-26
申请号:US17670355
申请日:2022-02-11
Applicant: Intel Corporation
Inventor: Anjali Singhai JAIN , Keren GUY , Jayaprakash SHANMUGAM , Neerav PARIKH , Daniel DALY , Arunkumar BALAKRISHNAN
IPC: H04L41/0803
Abstract: Examples described herein relate to a packet processing device that includes circuitry to perform packet processing operations according to a configuration and circuitry to execute control plane software to provide the configuration to the circuitry to perform packet processing operations according to the configuration. In some examples, the circuitry to perform packet processing operations according to the configuration is to continue operation independent of operation of the circuitry to execute control plane software.
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公开(公告)号:US20220103530A1
公开(公告)日:2022-03-31
申请号:US17544699
申请日:2021-12-07
Applicant: Intel Corporation
Inventor: Daniel DALY , Anjali Singhai JAIN , Yadong LI , Stephen DOYLE , Naru Dames SUNDAR , Chih-Jen CHANG , Sailesh BISSESSUR , Andrew CUNNINGHAM , Edwin VERPLANKE , Patrick FLEMING
IPC: H04L9/08
Abstract: Examples described herein relate to a network interface device that includes circuitry, configured to perform encryption of data, generate one or more packets from the encrypted data, cause transmission of the one or more packets with the encrypted data, manage reliability of transport of the transmitted one or more packets with the encrypted data, and share protocol state information between a host system and the network interface device using connectivity based on user space accessible queues.
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公开(公告)号:US20210243247A1
公开(公告)日:2021-08-05
申请号:US17238960
申请日:2021-04-23
Applicant: Intel Corporation
Inventor: Shaopeng HE , Cunming LIANG , Haitao KANG , Hongjun NI , Jiang YU , Ziye YANG , Anjali Singhai JAIN , Daniel DALY , Yadong LI , Ping YU , Bo CUI , Jingjing WU , Liang MA , Changpeng LIU
IPC: H04L29/08
Abstract: Examples described herein relate to a switch comprising a programmable data plane pipeline, wherein the programmable data plane pipeline is configured to provide microservice-to-microservice communications within a service mesh. In some examples, to provide microservice-to-microservice communications within a service mesh, the programmable data plane pipeline is to perform a forwarding operation for a communication from a first microservice to a second microservice. In some examples, to perform a forwarding operation for a communication from a first microservice to a second microservice, the programmable data plane pipeline is to utilize a reliable transport protocol.
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公开(公告)号:US20200236140A1
公开(公告)日:2020-07-23
申请号:US16838888
申请日:2020-04-02
Applicant: Intel Corporation
Inventor: Arvind SRINIVASAN , Daniel DALY
Abstract: Examples described herein relate to an interface that is to receive data for transmission and based on indication of failure of receipt of one or more packets that carry segments of the data, cause re-transmission of solely one or more of the multiple packets that comprise a segment of the data referenced by the indication of failure of receipt of one or more packets. In some examples, the interface is to encrypt the data using an encryption engine and to segment the data for transmission using one or more packets. In some examples, the interface is to receive the data and an indication of which segment of the data to re-transmit; encrypt the data; segment the encrypted data into one or more packets; and based on the indication of which segment of the data to re-transmit, transmit solely one or more of the multiple packets that comprise a segment of the data referenced by the indication of failure of receipt of one or more packets.
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公开(公告)号:US20230247005A1
公开(公告)日:2023-08-03
申请号:US18132666
申请日:2023-04-10
Applicant: Intel Corporation
Inventor: Chun LI , Kefei ZHANG , Nupur JAIN , Daniel DALY , Edmund CHEN , Fusheng ZHAO
IPC: H04L9/40
CPC classification number: H04L63/0281 , H04L63/0254
Abstract: Examples described herein relate to a system for offloading a proxy for microservice-to-microservice communication to a network interface device. In some examples, the system includes a host interface and a network interface device circuitry comprising circuitry coupled to the host interface. In some examples, the circuitry is configured to: perform offloaded proxy operations of a service mesh interface for multiple services, wherein the circuitry is accessible via a virtual network device by a host processor-executed service of the multiple services and wherein the service mesh interface is to provide access to a service mesh to communicate with one or more services.
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公开(公告)号:US20230053744A1
公开(公告)日:2023-02-23
申请号:US17981255
申请日:2022-11-04
Applicant: Intel Corporation
Inventor: Shaopeng HE , Cunming LIANG , Jiang YU , Ziye YANG , Ping YU , Bo CUI , Jingjing WU , Liang MA , Hongjun NI , Zhiguo WEN , Changpeng LIU , Anjali Singhai JAIN , Daniel DALY , Yadong LI
IPC: H04L49/9057 , H04L47/56 , H04L47/34 , H04L1/18 , H04L49/552
Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.
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