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公开(公告)号:US20240186197A1
公开(公告)日:2024-06-06
申请号:US18060592
申请日:2022-12-01
Applicant: Intel Corporation
Inventor: Aaditya Anand CANDADAI , Nicholas HAEHN , Ao WANG , Whitney BRYKS , Srinivas PIETAMBARAM
IPC: H01L23/16
CPC classification number: H01L23/16
Abstract: The present disclosure is directed to a semiconductor panel providing a laminated structure and a plurality of electrically isolated structures distributed throughout the laminated structure to increase an attraction between the laminated structure and an electrostatic chuck. In an aspect, the electrically isolated structures are positioned in spaces in the semiconductor panel without electrically active devices and interconnects. In yet another aspect, the present method provides a semiconductor panel and forming a plurality of electrically isolated structures in selected positions on the semiconductor panel and an electrostatic chuck configured to carry an electrostatic charge for producing an electrostatic force at its top surface, placing the semiconductor panel on the electrostatic chuck, and activating the electrostatic chuck to induce polarization at the top surface to produce an attractive force having a greater magnitude at the positions with the plurality of electrically isolated structures.
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2.
公开(公告)号:US20240222089A1
公开(公告)日:2024-07-04
申请号:US18090400
申请日:2022-12-28
Applicant: Intel Corporation
Inventor: Ala OMER , Peumie ABEYRATNE KURAGAMA , Jieying KONG , Wendy LIN , Ao WANG
IPC: H01J37/32 , H01L21/3105
CPC classification number: H01J37/32715 , H01L21/31058 , H01J2237/2007 , H01J2237/20235 , H01J2237/334 , H01J2237/3355 , H01J2237/336 , H01L21/02063
Abstract: This disclosure describes designs and methods for via cleaning, peeling protective film, and providing mild surface roughening and cleaning of a computer chip. A system may include a first electrode configured to generate plasma associated with cleaning vias by etching a residual material associated with smearing; an electrostatic stage configured to generate an electrostatic force associated with peeling the dielectric protective film from the semiconductor; and a stage on which the semiconductor is positioned while the electrostatic stage peels the dielectric protective film from the semiconductor, wherein the plasma is further associated with roughening a surface of the semiconductor after peeling the dielectric protective film from the semiconductor.
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