公开(公告)号：US11328979B2

公开(公告)日：2022-05-10

申请号：US16639956

申请日：2017-09-30

Applicant: Intel Corporation

Inventor： Feras Eid ,  Dinesh Padmanabhan Ramalekshmi Thanu ,  Sergio Chan Arguedas ,  Johanna M. Swan ,  John J. Beatty

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16

Abstract: A device package and a method of forming a device package are described. The device package includes a plurality of posts disposed on a substrate. Each post has a top surface and a bottom surface that is opposite from the top surface. The device package also has one or more dies disposed on the substrate. The dies are adjacent to the plurality of posts on the substrate. The device package further includes a lid disposed above the plurality of posts and the one or more dies on the substrate. The lid has a top surface and a bottom surface that is opposite from the top surface. Lastly, an adhesive layer attaches the top surfaces of the plurality of posts and the bottom surface of the lid. The device package may also include one or more thermal interface materials (TIMs) disposed on the dies.

公开(公告)号：US20230197659A1

公开(公告)日：2023-06-22

申请号：US17556444

申请日：2021-12-20

Applicant: Intel Corporation

Inventor： Mukund Ayalasomayajula ,  Dinesh Padmanabhan Ramalekshmi Thanu ,  Rui Zhang ,  Xiao Lu ,  Robert Nickerson ,  Patrick Neel Stover

IPC: H01L23/00

CPC classification number: H01L24/16 ,  H01L24/03 ,  H01L24/81 ,  H01L2924/1432 ,  H01L2924/0105 ,  H01L2924/01029 ,  H01L2924/01047

Abstract: A die package comprises a substrate comprising a solder pad element, a semiconductor die coupled to the substrate, a solder layer comprising a first solder material deposited on the solder pad element, the first solder material having a first melting temperature, and an interconnect ball comprising a second solder material deposited on the solder layer, the second solder material having a second melting temperature that is less than the first melting temperature.

公开(公告)号：US11676873B2

公开(公告)日：2023-06-13

申请号：US16614765

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Dinesh Padmanabhan Ramalekshmi Thanu ,  Hemanth K. Dhavaleswarapu ,  Venkata Suresh Guthikonda ,  John J. Beatty ,  Yonghao An ,  Marco Aurelio Cartas Ayala ,  Luke J. Garner ,  Peng Li

IPC: H01L23/16 ,  H01L21/52 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/16 ,  H01L23/00 ,  H01L25/18

CPC classification number: H01L23/16 ,  H01L21/52 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/5383 ,  H01L25/0655 ,  H01L25/165 ,  H01L24/32 ,  H01L24/48 ,  H01L25/18 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2924/19041 ,  H01L2924/19105

Abstract: Semiconductor packages having a sealant bridge between an integrated heat spreader and a package substrate are described. In an embodiment, a semiconductor package includes a sealant bridge anchoring the integrated heat spreader to the package substrate at locations within an overhang gap laterally between a semiconductor die and a sidewall of the integrated heat spreader. The sealant bridge extends between a top wall of the integrated heat spreader and a die side component, such as a functional electronic component or a non-functional component, or a satellite chip on the package substrate. The sealant bridge modulates warpage or stress in thermal interface material joints to reduce thermal degradation of the semiconductor package.

公开(公告)号：US20190006259A1

公开(公告)日：2019-01-03

申请号：US15637107

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Dinesh Padmanabhan Ramalekshmi Thanu ,  Wei Hu ,  James C. Matayabas, JR. ,  Baris Bicen ,  Luke J. Garner ,  Hemanth Dhavaleswarapu

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/00

Abstract: Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a first die disposed on a substrate and a second die disposed adjacent the first die on the substrate. A cooling solution is attached to the substrate, wherein a rib extends from a central region of the cooling solution and is attached to the substrate. The rib is disposed between the first die and the second die.