公开(公告)号：US12080655B2

公开(公告)日：2024-09-03

申请号：US16368032

申请日：2019-03-28

Applicant: Intel Corporation

Inventor： Gianni Signorini ,  Georg Seidemann ,  Bernd Waidhas

IPC: H01L23/552 ,  H01L21/48 ,  H01L21/78 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838

Abstract: Embodiments disclosed herein include electronic packages with conformal shields and methods of forming such packages. In an embodiment, the electronic package comprises a die having a first surface, a second surface opposite the first surface, and sidewall surfaces. A redistribution layer is over the first surface of the die, and the redistribution layer comprises a first conductive layer. In an embodiment, an under ball metallization (UBM) layer is over the redistribution layer, and a conductive shield is over the sidewall surfaces of the die and the second surface of the die. In an embodiment, the conductive shield is electrically coupled to the UBM layer.

公开(公告)号：US11646288B2

公开(公告)日：2023-05-09

申请号：US16635146

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Gianni Signorini ,  Veronica Sciriha ,  Thomas Wagner

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L24/20 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2924/15311 ,  H01L2924/19104

Abstract: In accordance with disclosed embodiments, there is a method of integrating and accessing passive components in three-dimensional fan-out wafer-level packages. One example is a microelectronic die package that includes a die, a package substrate attached to the die on one side of the die and configured to be connected to a system board, a plurality of passive devices over a second side of the die, and a plurality of passive device contacts over a respective passive die, the contacts being configured to be coupled to a second die mounted over the passive devices and over the second side of the die.