公开(公告)号：US09712167B2

公开(公告)日：2017-07-18

申请号：US14582867

申请日：2014-12-24

Applicant: Intel Corporation

Inventor： Hong Yun Tan ,  Anant Deval ,  R. Kenneth Hose

IPC: H03K19/003 ,  G06F1/16 ,  H03K17/16 ,  H03K17/30 ,  H03K19/00 ,  G06F1/20 ,  H03K19/0948

CPC classification number: H03K19/00315 ,  G06F1/16 ,  G06F1/20 ,  H03K17/163 ,  H03K17/302 ,  H03K19/0016 ,  H03K19/0948

Abstract: Described is an apparatus which comprises: a first node to provide an un-gated power supply; a second node to provide a threshold dependent supply; an inverter with an input and an output, the inverter coupled to the first and second nodes, the inverter to receive the un-gated power supply at its power supply node, and to receive the threshold dependent supply for supplying ground supply at its ground node; and a transistor with its gate terminal coupled to the output of the inverter, the transistor to provide gated power supply to one or more logic units.

公开(公告)号：US09350165B2

公开(公告)日：2016-05-24

申请号：US13669204

申请日：2012-11-05

Applicant: Intel Corporation

Inventor： Christopher P. Mozak ,  Hong Yun Tan

IPC: H02H9/02 ,  H02H9/04 ,  H03K17/10 ,  H03K17/22

CPC classification number: H02H9/046 ,  H03K17/102 ,  H03K17/223

Abstract: Power gating circuits. A transistor stack is coupled between a voltage supply to provide a gated supply voltage. The supply voltage is greater than the maximum junction voltage of the individual transistors in the transistor stack. Termination circuitry for input/output (I/O) lines coupled to operate using the gated supply voltage. The termination circuitry comprising at least a resistive element coupled between an I/O interface and a termination voltage supply.

Abstract translation: 电源门控电路。 晶体管堆叠耦合在电压源之间以提供门控电源电压。 电源电压大于晶体管堆叠中单个晶体管的最大结电压。 用于输入/输出（I / O）线的端接电路，其耦合以使用门控电源电压进行操作。 所述终端电路至少包括耦合在I / O接口和终端电压源之间的电阻元件。

公开(公告)号：US08922252B2

公开(公告)日：2014-12-30

申请号：US13720471

申请日：2012-12-19

Applicant: Intel Corporation

Inventor： Hong Yun Tan ,  Anan S. Deval ,  R. Kenneth Hose

IPC: H03B1/00 ,  H03K3/00 ,  H03K17/16 ,  H03K17/30 ,  G06F1/16 ,  H03K19/00

CPC classification number: H03K19/00315 ,  G06F1/16 ,  G06F1/20 ,  H03K17/163 ,  H03K17/302 ,  H03K19/0016 ,  H03K19/0948

Abstract: Described is an apparatus which comprises: a first node to provide an un-gated power supply; a second node to provide a threshold dependent supply; an inverter with an input and an output, the inverter coupled to the first and second nodes, the inverter to receive the un-gated power supply at its power supply node, and to receive the threshold dependent supply for supplying ground supply at its ground node; and a transistor with its gate terminal coupled to the output of the inverter, the transistor to provide gated power supply to one or more logic units.

Abstract translation: 描述了一种装置，其包括：提供非门控电源的第一节点; 提供阈值依赖电源的第二节点; 具有输入和输出的逆变器，反相器耦合到第一和第二节点，逆变器接收其电源节点处的未门控电源，并接收用于在其接地节点处提供地电源的阈值依赖电源 ; 以及其栅极端子耦合到反相器的输出的晶体管，晶体管提供给一个或多个逻辑单元的门控电源。